Ibiapina, E., 		Silva, B., & 		Silva, I.
(2024).
 Implementation of 32-bit Multiplication Unit for a Out-of-Order RISC-V Processor utilizing Radix-4 Booth Algorithm and Wallace Tree.
In <em>Proceedings of the 12th Regional School on Computing of Ceará, Maranhão, and Piauí</em>, (pp. 291-296). Porto Alegre: SBC.
doi:10.5753/ercemapi.2024.243779