Ibiapina, E., 		Silva, B., & 		Silva, I.
2024 set 11.  Implementation of 32-bit Multiplication Unit for a Out-of-Order RISC-V Processor utilizing Radix-4 Booth Algorithm and Wallace Tree. Anais da Escola Regional de Computação do Ceará, Maranhão e Piauí (ERCEMAPI). [Online] :