Ibiapina, Enzo, Benjamin S. Silva, and Ivan S. Silva.
" Implementation of 32-bit Multiplication Unit for a Out-of-Order RISC-V Processor utilizing Radix-4 Booth Algorithm and Wallace Tree." <em>Anais da XII Escola Regional de Computação do Ceará, Maranhão e Piauí,
Parnaíba/PI, 2024</em>. SBC, 2024,  
pp.291-296.