Resource Tuning in a Multipath Superscalar Architecture - Santos, Tatiana G. S. dos; Pila, Maurício L.; Santos, Rafael R. dos; Chaves Filho, Eliseu Monteiro; Bampi, Sérgio; Navaux, Philippe O. A.; Nemirovsky, Mario D. (Anais do International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD); 1999: Anais do XI Symposium on Computer Architecture and High Performance ComputingDO - 10.5753/sbac-pad.1999.19768, 1999)
This paper presents the resource tuning in a multipath superscalar architecture model. The main goal of this model is to provide a high bandwidth for superscalar architectures that need a high instruction throughput. This architecture has an aggressive fetch mechanism to increase the number of instructions available to the execution stage of the pipeline, allowing a high number of instructions to be executed per cycle. To achieve this, instructions from multiple paths are fetched in the same clock cycle. The model results in a reduction of the occurrence of breaks in the flow. A more detailed study into the resource distribution throughout the architecture is needed. Simply increasing the number of resources to support throughput is not recommended, given the prohibitive implementation costs. The resource tuning of this superscalar architecture is then an important focus of research, to balance resource requirements and to tune them.