Using Operand Factorization to Compress DSP Programs - Pannain, Ricardo; Centoducatte, Paulo; Araujo, Guido (Anais do International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 1999)
We propose a method for compressing programs running on embedded DSPs. Program expression trees are decomposed into opcode and operand sequences called patterns. We show that DSP program patterns have exponential frequency distribution. Based on that, we encode patterns using a mix of a variable-length and fixed-length codewords. A decompression engine is proposed, which converts patterns into uncompressed instruction sequences. The experimental results reveal an average compression ratio of 67% for typical DSP programs running on TMS320C25 processor. This ratio includes an estimate of the size of the decompression engine.