Matrix calculations with SIMD floating point instructions on x86 processors - Muezerie, André; Nakashima, Raul J.; Travieso, Gonzalo; Slaets, Jan (Anais do International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), 2001)
This paper describes and evaluates the use of SIMD floating point instructions for scientific calculations. The performance of these instructions is compared with ordinary floating point code. Implementation concerns, the effects of loop unroll as well as matrix size variations are analyzed. Execution speeds are compared using matrix multiplication. The intrinsic incompatibility of the SIMD floating point implementations used by different manufacturers requires the use of two different instruction sets: 3DNOW! on the AMD K6 processor and the Streaming-SIMD Extensions (SSE) on the Intel Pentium III processor.