LIMA, C. D.; 						NAKAMURA, T..
 Exploiting loop-level parallelism with the Shift Architecture. <em>In</em>: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 14.	, 2002, Vitória/ES.
	 
	<strong>Anais</strong> [...].
 Porto Alegre: Sociedade Brasileira de Computação, 
	2002
.
 p. 184-191.