Reusing traces in a dynamic conditional execution architecture - Santos, T. G. S. dos; Bampi, S.; Navaux, P. O. A.; Santos, R. R. dos; Nemirovsky, M. (Anais do International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD); 2005: Anais do XVII International Symposium on Computer Architecture and High Performance Computing, 2005)
The cost of control and data dependences in superscalar processors is still an open issue, for what no definitive solution was yet found. Moreover, the cost of branch mispredictions is getting worse due to the increasing number of pipeline stages. The dynamic conditional execution (DCE) is a new approach to address this problem. The basic idea is to fetch and execute all paths produced by a branch that obey certain restrictions regarding complexity and size. As a consequence, a smaller number of predictions is performed, and therefore, a smaller number of branches is mispredicted. Although the execution of multiple paths of certain branches allows for a reduction in branch misprediction penalties, it implies on an increase in the number of executed instructions. Thus, an alternative to reduce the overhead created by DCE pipeline is to reuse previously executed values, freeing up resources for more useful instructions. The goal of this work is to analyze the impact of value reuse in DCE architecture. As it is presented, this effectively reduces the overhead produced by the architecture, increasing the overall performance. This paper shows that, in some cases, the speedup gain exceeds 60% over the original DCE architecture.