TRAP: Time-Aware Probabilistic In-Dram RowHammer Solution - Verma, Samiksha; Singh, Virendra (Anais do International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD); 2025: Anais do XXXVII International Symposium on Computer Architecture and High Performance Computing, 2025)
DRAM continues to serve as the backbone of main memory in modern computing systems. However, it is increasingly vulnerable to RowHammer, a circuit-level vulnerability in which repeated activation of a row can induce bit flips in adjacent rows. Among the range of mitigation strategies, low cost inDRAM solutions are particularly attractive because they operate entirely within the DRAM chip and require no changes to the broader system architecture. Despite their appeal, existing inDRAM defenses often face two critical limitations: non-uniform mitigation probability across vulnerable rows and high non-selection rates, both of which reduce their effectiveness and reliability under worst-case access patterns.We propose TRAP: Time-Aware Probabilistic in-DRAM RowHammer Protection. TRAP is a lightweight, hardware-efficient scheme that introduces time-slot-based sampling probabilities for each row activation within a DRAM refresh interval. TRAP tracks the timing of activations using a per-bank counter and applies analytically derived probabilities from a precomputed lookup table, ensuring uniform mitigation coverage and reducing the probability of no selection to near zero. Evaluations on SPEC2017, PARSEC, and LIGRA benchmarks demonstrate that TRAP delivers strong and consistent protection with zero performance overhead and only 2.5% DRAM energy increase. When integrated with the DDR5 Refresh Management (RFM) feature, TRAP incurs just 0.2% slowdown, underscoring its practicality for future DRAM systems.