Hardware Protection with Security Protocol and Data Model - Bastos, Gustavo C.; Simplício Jr., Marcos A.; Albertini, Bruno C. (Companion Proceedings of the Brazilian Symposium on Cybersecurity (SBSeg); 2025: Companion Proceedings of the 25th Brazilian Symposium on Cybersecurity, 2025)
A critical security threat to modern computer systems involves hardware-level attacks, such as firmware manipulation. These attacks are particularly dangerous because they enable unauthorized data access at the bus level, making eavesdropping or tampering difficult to detect. One possible countermeasure is the Security Protocol and Data Model (SPDM), an industry standard for hardware component mutual attestation and secure channel establishment. In this work, we present the design, implementation, and execution of SPDM on an FPGA (Field-Programmable Gate Array). Our test environment consists of a RISC-V SoC and an Ethernet card, where the bootcode (BIOS) authenticates the peripheral (Ethernet card) using SPDM.