Instruction Compression in Runtime for Embedded Systems - Dias, Wanderson Roger Azevedo; Barreto, Raimundo da Silva; Moreno, Edward David (Anais do Simpósio em Sistemas Computacionais de Alto Desempenho (SSCAD); 2011: Anais do XII Simpósio em Sistemas Computacionais de Alto Desempenho, 2011)
The efficient use of embedded systems relies heavily on appropriate strategies to optimize the execution time and power consumption. These systems are characterized by resource restrictions, including the amount of memory available for applications. However, there are several techniques that make the embedded systems more efficient. One of those techniques is the code compression; the proposals found in the analyzed literature assume that the code is compressed at compilation time and decompressed at runtime. This article proposes the development of a new method of compression and decompression (on-the-fly) called of MIC (Middle Instruction Compression). The MIC was compared with the Huffman method and both were implemented in hardware using VHDL and FPGA. The results of our experiments showed that the MIC achieved better performance when compared to Huffman for some programs from MiBench. We have reduced 17% the number of logical elements of FPGA and 6% clock frequency (in MHz) and 42% rate of compression.