Avaliando o Impacto de Mudanças na Arquitetura de Memória entre Gerações de GPGPUs no Desempenho das Otimizações de Computações de Estênceis

• Rodrigo L. Machado ITA
• Thiago C. Nasciutti ITA
• Jairo Panetta ITA

DOI: https://doi.org/10.5753/eradsp.2018.13598

Abstract

This article explore the impact of coding optimization, with focus on memory hierarchy, in two GPGPUs from distinct generations. The results are compared and explained in light of the memory hierarchy variation between generations.

References

Andreolli C, Thierry P, Borges L, Skinner G and Yount C (2015), Characterization and Optimization Methodology Applied to Stencil Computations in Reinders J and Jeffers J (eds.) High Performance Parallelism Pearls, Morgan Kaufmann.

Micikevicius, P (2009), 3d finite difference computation on gpus using cuda in Proceedings of 2ndWorkshop on General Purpose Processing on Graphics Processing Units, GPGPU-2, ACM.

Serpa MS, Cruz EH, Diener M, Krause AM, Farres A, Rosas C, Panetta J, Hanzich M and Navaux PO (2017), Strategies to improve the performance of a geophysics model for different manycore systems, WAMCA.

Thiago C. Nasciutti, Jairo Panetta (2016), Impacto da Arquitetura de Memória de GPGPUs na Velocidade da Computação de Estênceis, WSCAD.

NVIDIA, Tuning CUDA applications for Pascal v9.1.85, NVIDIA online documentation.