Maximizing Throughput-per-Joule of a Hybrid Communication Infrastructure Through a Software-Hardware based DVFS Mechanism

• Rafael Faccenda UFSM
• Carlos Gabriel de Araujo Gewehr UFSM
• Antonio Carlos Schneider Beck UFRGS
• Mateus Beck Rutzig UFSM

Resumo

Embedded systems have been demanding massive parallel computing encapsulated inside one single chip. As more cores are integrated into a single chip, higher bandwidth must be available, which conflicts with severe power constraints of embedded devices. Dynamic Voltage and Frequency Scaling techniques have been widely employed in homogeneous communication infrastructures to tune the available throughput of the fabric to best fit the application communication demands. However, homogeneous infrastructures have a restricted number of voltage and frequency pairs due to their uniform fabric shape, which limits the opportunities to maximize power savings. In this work, we propose a software-hardware based DVFS in a Hybrid Communication Infrastructure composed by Bus, Crossbar and NoC to maximize the Throughput-per-Joule. The proposed DVFS approach works at structure-level by adjusting voltage/frequency of each structure depending on the application demands. The proposed DVFS mechanism improves the Throughput-per-Joule (TpJ), on average, in 29% over the Hybrid Structure without DVFS. Moreover, it boosts TpJ gains over Network on Chip fabrics by 23% in scenarios where both fabrics offer the same throughput.

Palavras-chave: Fabrics, Throughput, Task analysis, Software, Bridge circuits, Parallel processing, Yarn