A Simultaneous Multithreading Processor Architecture with Predictable Timing Behavior

• Hadley Siqueira UFRN
• Márcio Kreutz UFRN

Resumo

Real-time embedded systems need software and hardware to be time-predictable in order to guarantee correct behavior of the system. Precision Timed Machines are architectures designed for timing predictability and repeatability. They help to improve design time and efficiency of real-time embedded systems by allowing to separately verify timing properties of modules. This paper presents a Simultaneous Multithreading Precision Timed Machine named Hivek-RT that can execute hard real-time and non hard real-time threads in parallel. It employs a repeatable thread-interleaved pipeline with an exposed memory hierarchy composed of scratchpads, caches and a predictable SDRAM memory controller. The proposed architecture is well suited for real-time embedded systems as experimentation results show that the proposed architecture has improved throughput, presents low memory footprint and only slightly degrades memory bandwidth while providing deterministic time access to the memory hierarchy.

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