RAPTOR-Design: Refactorable Architecture Processor to Optimize Recurrent Design

  • P. Garcia University of Minho
  • T. Gomes University of Minho
  • F. Salgado University of Minho
  • J. Cabral University of Minho
  • J. Monteiro University of Minho
  • A. Tavares University of Minho

Resumo


The growth in embedded systems complexity has created the demand for novel tools which allow rapid systems development and facilitate the designer's management of complexity. Especially since systems must incorporate a variety of often contradictory characteristics, achieving design metrics in short development time is an increasing challenge. This paper presents RAPTOR-Design, a framework for System-on-Chip (SoC) design which incorporates a customizable processor architecture and allows rapid software-to-hardware migration, custom hardware integration in a tightly-coupled fashion and seamless Fault Tolerance (FT) capabilities for FPGA platforms. Impact on design metrics of processor customization, FT-capabilities and custom hardware integration are presented, as well as an overview of the design process using RAPTOR-Design.

Palavras-chave: Field programmable gate arrays, Detectors, Computer architecture, Hardware, Fault tolerance, Fault tolerant systems, Registers, FPGA, Microprocessor, Custom Computational Units
Publicado
05/11/2012
GARCIA, P.; GOMES, T.; SALGADO, F.; CABRAL, J.; MONTEIRO, J.; TAVARES, A.. RAPTOR-Design: Refactorable Architecture Processor to Optimize Recurrent Design. In: SIMPÓSIO BRASILEIRO DE ENGENHARIA DE SISTEMAS COMPUTACIONAIS (SBESC), 2. , 2012, Natal/RN. Anais [...]. Porto Alegre: Sociedade Brasileira de Computação, 2012 . p. 188-191. ISSN 2237-5430.