Flexible Wrapper for Ensemble Machine Learning Trees Targeting High-Performance HBM-FPGAs

• Icaro G. S. Moreira UFV
• Olavo Silva UFV
• Lucas Bragança UNICAMP
• Racyus D. G. Pacífico UFOP
• Ricardo Ferreira UFV
• José Augusto M. Nacif UFV

Resumo

Machine learning (ML) increases the demand for real-time inference and efficient hardware-based acceleration. This paper evaluates decision tree ensemble implementations on FPGA platforms coupled with High Bandwidth Memory (HBM). While traditional implementations often deploy hundreds of trees ("jungles") to maximize accuracy, our work demonstrates that carefully designed compact ensembles ("copses") can achieve comparable accuracy while better aligning with the architectural constraints of modern FPGA-HBM systems. We present a flexible wrapper for the automatic implementation of ML models, particularly tree-based models, on hardware. In addition, we developed a custom tree-based architecture with a variable pipeline aimed at maximizing throughput. By distributing smaller tree ensembles across parallel processing modules with direct HBM access, we eliminate the performance bottlenecks associated with large monolithic implementations that necessitate complex interconnection networks. We implemented the accelerator on the Xilinx Alveo FPGA platform, using 32 HBM channels, and performed the experiments in a realistic high-performance HPC cluster. Our results demonstrate that the accelerator processes 17 billion samples and low logic resource utilization while leveraging the high memory bandwidth of HBM.

Palavras-chave: Accuracy, Trees (botanical), Biological system modeling, Neural networks, Bandwidth, Throughput, Time measurement, Decision trees, Field programmable gate arrays, Random forests, Machine Learning, Neural Networks, Decision Trees, Hardware Accelerator, FPGAs, HBMs, Random Forest