Go Fast: GPU Optimizer for FPGA-LUT Approximate Simulation and Tuning

• Olavo Barros UFV
• Isabela Freitas UFV
• Pedro Coura UFV
• José Augusto M. Nacif UFV
• Ricardo Ferreira UFV
• Adrián Alcolea Universidad de Zaragoza
• María Villarroya-Gaudó Universidad de Zaragoza
• Javier Resano Universidad de Zaragoza

Resumo

This paper introduces Go-Fast, a novel approach that accelerates the simulation and optimization of LUT-based FPGA circuits using GPUs. Unlike previous GPU-based simulators that target general digital circuits with event-driven approaches, Go-Fast employs batch simulation techniques specifically optimized for approximate computing scenarios. The system utilizes both data parallelism to execute testbenches across numerous threads and structural parallelism for simultaneous simulation and logic pruning. Go-Fast fully exploits GPU architectural features by maximizing register usage, minimizing memory access, and allocating more work per thread. This domain-specific approach generates efficient source-to-source CUDA code that achieves significant performance improvements: five orders of magnitude over the Verilator simulator and two to three orders over optimized multi-core implementations.

Palavras-chave: Systematics, Instruction sets, Approximate computing, Graphics processing units, Parallel processing, Systems engineering and theory, Table lookup, Logic, Field programmable gate arrays, Tuning, FPGA simulation, GPU acceleration, Batch simulation, Source-To-source CUDA