FPGA Validation of a RISC-V Core Dedicated to Quantum Circuit Simulation
Abstract
The cost of developing a quantum computer is currently high. In this context, this article aims to describe the processes and results of research focused on developing a RISC-V core dedicated to quantum circuit simulation. The adopted methodology involved simplifying the Tiny RISC-V processor and conducting tests and validations on a Field-Programmable Gate Array (FPGA). The results are promising, indicating the feasibility of instantiating multiple cores to explore parallelism to perform quantum circuits simulation, as an alternative to GPU simulation.References
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Gebauer, R., Karcher, N., and Sander, O. (2021). A modular rfsoc-based approach to interface superconducting quantum bits. In 2021 International Conference on Field-Programmable Technology (ICFPT), pages 1–9.
Harris, D. M. and Harris, S. L. (2021). Digital Design and Computer Architecture: RISC-V Edition. Morgan Kaufmann.
Hushon (2020). Tiny-riscv-cpu: A simple risc-v cpu written in verilog. [link]. Acesso em: jun. 2025.
John, L. (2017). Computer Organization and Design Risc-v Edition-the Hardware Software Int. Elsevier Science & Technology.
Nielsen, M. A. and Chuang, I. L. (2010). Quantum Computation and Quantum Information. Cambridge University Press, 10th anniversary edition edition.
NLP, R. (2023). Bases matemáticas da computação quântica: Álgebra linear, superposição e entrelaçamento. [link]. Acessado em: 16 jun. 2025.
Nunes, J. (2016). Computadores quânticos, informação e computação quânticas. Correio dos Açores, pages 17–17.
Patterson, D. A. and Hennessy, J. L. (2017). Computer Organization and Design RISC-V Edition: The Hardware Software Interface. Morgan Kaufmann. Acesso em: 21 jun. 2025.
SpinQuanta (2024). World’s cheapest quantum computer: Affordable for quantum education. Accessed: 2025-06-20.
SpinQuanta (2025). Superconducting quantum computer price range: Full overview. Accessed: 2025-06-20.
Wang, S., Wang, X., Xu, Z., Chen, B., Feng, C., Wang, Q., and Ye, T. T. (2024). Optimizing cnn computation using risc-v custom instruction sets for edge platforms. IEEE Transactions on Computers, 73(5):1371–1384.
Zhao, Y., Kuang, H., Sun, Y., Yang, Z., Chen, C., Meng, J., and Han, J. (2023). Enhancing risc-v vector extension for efficient application of post-quantum cryptography. In 2023 IEEE 34th International Conference on Application-specific Systems, Architectures and Processors (ASAP), pages 10–17.
Zhao, Y., Xie, R., Xin, G., and Han, J. (2022). A high-performance domain-specific processor with matrix extension of risc-v for module-lwe applications. IEEE Transactions on Circuits and Systems I: Regular Papers, 69(7):2871–2884.
Published
2025-08-12
How to Cite
ANDRADE, Thiago; NASCIMENTO, Breno; CONCEIÇÃO, Calebe; GARCIA, Rodolfo.
FPGA Validation of a RISC-V Core Dedicated to Quantum Circuit Simulation. In: REGIONAL SCHOOL ON COMPUTING OF BAHIA, ALAGOAS, AND SERGIPE (ERBASE), 25. , 2025, Lagarto/SE.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
2025
.
p. 251-260.
DOI: https://doi.org/10.5753/erbase.2025.13737.
