PAD Cluster: An Open, Modular and Low Cost High Performance Computing System
Resumo
This work presents the PAD Cluster, the result of PAD Elebra Project. lt was built on COTS (commodity off-the shelf) components. lt is shown the hardware and software architecture of the cluster. Some performance results are presented in the implementation of an user level communication library. Cluster management tools for a single point of control are also presented.
Palavras-chave:
High performance computing, Cluster of workstations, parallel processing
Referências
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BOBEN, N. J.; COHEN, D. et al. Myrinet:a Gigabit-per-second local area network. IEEE Micro. pp29-35, Feb. 1995
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DIETZ, H. G. A fine-grain Parallel Architecture based on barrier Synchronization. Proceedings of the International Conference on Parallel Processing. Pp247-50. August 1996.
GEROMEL, Paulo A.; KOFUJI, Sergio T. Avaliação do U-NET em Clusters com Rede Myrinet. In: X Simpósio Brasileiro de Arquitetura de Computadores - Processamento de Alto Desempenho. Anais. Buzios, RJ. 1998. pp. 119-128.
GEROMEL, Paulo A. Protocolos leves de comunicação para sistemas de alto desempenho. São Paulo: Escola Politécnica da USP, 1998 (MSC Thesis).
LEWINE, D. POSIX Programmer's Guide. O'Reilly & Associates, 1991
MENDES, C.; PANETTA, J. Selecting Directions for Parallel RAMS Performance Optimization. In: Symposium on Computer Architecture and High Performance Computing, 11, 1999. Proceedings.
PACHECO, P. S. Parallel Programming with MPI. Morgan Kaufmann Publishers, 1997
TORRES, Martha X.; KOFUJI, Sergio T. The barrier synchronization impact on the MPI programs performance using a cluster of workstations. International Symposium on Parallel Architecture, Algorithms and Networks. Proceedings. Taipei. Taiwan, ROC, 1997.
TORRES, Martha X.; KOFUJI, Sergio T. The Influence of barrier Synchronization on the MPI Programs Performance Using the AP 1000 Multicomputer. 16th IASTED International Conference on Applied Informatics; Garmisch-Partenkirchen, Germany, Proceedings. 1998. pp 334-336.
HORTA, Edson; KOFUJI, Sergio T. Using a reconfigurable switch to improve MPI performance. In: JCIS'98. Proceedings, Vol. III. North Carolina, EUA. pp 66-69.
NETTO, Mareio L. Development of High Performance Parallel Graphical Applications with Efficient Parallel Processing and Adaptive Techniques, Ph.D. Thesis, Shaker Verlag, 1998.
WELSH, M. et al. ATM and Fast Ethernet Network Interface for user-level communication. In: Proceedings of High Performance Computer Architecture 3. San Francisco, Feb. 1997
WIMER, W. Internet Request For Comments #1542: Classifications and Extensions for the bootstrap Protocol. 1993.
BOBEN, N. J.; COHEN, D. et al. Myrinet:a Gigabit-per-second local area network. IEEE Micro. pp29-35, Feb. 1995
CROFT, W. J.; GILMORE, J Request For Comments #951 : Bootstrap Protocol., 1985.
DIETZ, H. G. A fine-grain Parallel Architecture based on barrier Synchronization. Proceedings of the International Conference on Parallel Processing. Pp247-50. August 1996.
GEROMEL, Paulo A.; KOFUJI, Sergio T. Avaliação do U-NET em Clusters com Rede Myrinet. In: X Simpósio Brasileiro de Arquitetura de Computadores - Processamento de Alto Desempenho. Anais. Buzios, RJ. 1998. pp. 119-128.
GEROMEL, Paulo A. Protocolos leves de comunicação para sistemas de alto desempenho. São Paulo: Escola Politécnica da USP, 1998 (MSC Thesis).
LEWINE, D. POSIX Programmer's Guide. O'Reilly & Associates, 1991
MENDES, C.; PANETTA, J. Selecting Directions for Parallel RAMS Performance Optimization. In: Symposium on Computer Architecture and High Performance Computing, 11, 1999. Proceedings.
PACHECO, P. S. Parallel Programming with MPI. Morgan Kaufmann Publishers, 1997
TORRES, Martha X.; KOFUJI, Sergio T. The barrier synchronization impact on the MPI programs performance using a cluster of workstations. International Symposium on Parallel Architecture, Algorithms and Networks. Proceedings. Taipei. Taiwan, ROC, 1997.
TORRES, Martha X.; KOFUJI, Sergio T. The Influence of barrier Synchronization on the MPI Programs Performance Using the AP 1000 Multicomputer. 16th IASTED International Conference on Applied Informatics; Garmisch-Partenkirchen, Germany, Proceedings. 1998. pp 334-336.
HORTA, Edson; KOFUJI, Sergio T. Using a reconfigurable switch to improve MPI performance. In: JCIS'98. Proceedings, Vol. III. North Carolina, EUA. pp 66-69.
NETTO, Mareio L. Development of High Performance Parallel Graphical Applications with Efficient Parallel Processing and Adaptive Techniques, Ph.D. Thesis, Shaker Verlag, 1998.
WELSH, M. et al. ATM and Fast Ethernet Network Interface for user-level communication. In: Proceedings of High Performance Computer Architecture 3. San Francisco, Feb. 1997
WIMER, W. Internet Request For Comments #1542: Classifications and Extensions for the bootstrap Protocol. 1993.
Publicado
29/09/1999
Como Citar
BERNAL, Volnys Borges; KOFUJI, Sergio Takeo; SIPAHI, Guilherme Matos; ANDERSON, Allan G.; LOBO NETTO, Marcio.
PAD Cluster: An Open, Modular and Low Cost High Performance Computing System. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 11. , 1999, Natal.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
1999
.
p. 215-222.
DOI: https://doi.org/10.5753/sbac-pad.1999.19792.