Using Riscs on Digital Signal Processing

• Eduardo B. Wanderley Netto CEFET-RN
• Celso L. Mendes INPE
• Osamu Saotome ITA

DOI: https://doi.org/10.5753/sbac-pad.1996.19818

Resumo

RISC processors have proved to be efficient for processing general purpose tasks. Recently, RISCs have been successfully used also on some Digital Signal Processing (DSP) applications. This work shows how a generic RISC processor (DLX) performs on DSP algorithms, in comparison to a conventional digital signal processor, the TMS- 320C25. As a contribution of this work, we propose and evaluate a RISP (RISC dedicated for DSP) processor: dbcdsp. To measure performance, we use DSP kernels with simulators of the three processors. Our simulation results show that slight modifications on modern, general purpose RISCs can promote better performance for some kernels, even in comparison to a dedicated processor.

Referências

ESPONDA, M. and ROJAS, R. A graphical comparison of RISC processors. Computer Architecture News, v.20, n.4, p.2-8, Sept. 1992.

HENNESSY, John, and PATTERSON, David A. Computer architecture: a quantitative approach. San Marteo:Morgan Kaufmman Publishers, 1990.

LAPSLA Y, P. and BIER, J. DSP benchmarks: methodology and results. In: INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING APPLICATION AND TECHNOLOGV, 5, Oct. 18-21, 1994. Texas. Proceedings... Texas:[s.n.], 1994. p.871-876.

LEACH, R. Use of RISC processor in multicomputer environments. In: INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING APPLICATION AND TECHNOLOGY, 6, Oct. 24-26, 1995. Massachusetts. Proceedings... Massachusetts:[s.n], 1995. P.698-700.

PATTERSON, David A. and DITZEL, David R. The case for the reduced instruction set computer. Computer Architecture News, v. 8, n. 6, p. 25-33, Oct. 1980.

TEXAS INSTRUMENTS. TMS320C2x: user' s guide. [s.l.:s.n.], 1993.

VELARDE, Juan M. et. al. DSPstone: a DSP-oriented benchmarking methodology. In: INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING APPLICATION AND TECHNOLOGY, 5, Oct. 18-21, 1994. Texas. Proceedings... Texas:[s.n.], 1994. p.715-720.

WANDERLEY NETTO, Eduardo B. Uma arquitetura RISC para processamento digital de sinais, MSc thesis, São José dos Campos:ITA. 1995.

WANDERLEY NETTO, Eduardo B. OLIVEIRA, Rivanaldo S. and SAOTOME, Osamu. RISC processor for digital signal processing purposes. In: INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING APPLICATION AND TECHNOLOGY, 6, Oct. 2426, 1995. Massachusetts. Proceedings... Massachusetts:[s.n.], 1995. p.805-810.