Característica de Compartilhamento dos Programas Cholesky e MP3D

  • Sergio Takeo Kofuji USP
  • Martha Ximena Torres Delgado USP
  • Edward David Moreno Ordoñez USP
  • João Antonio Zuffo USP

Resumo


O SPLASH é um conjunto de programas aplicativos paralelos coletado pela Universidade de Stanford para uso em projeto e avaliação de sistemas multiprocessadores paralelos, distribuído livremente para fins acadêmicos. Utilizando simuladores baseados no MINT, será feita uma avaliação do comportamento de algumas aplicações do SPLASH. Três características serão estudadas, procurando estender os trabalhos anteriores da área e fornecer subsídios para a escolha de parâmetros arquiteturais do multiprocessador SPADE: i) o custo da sincronização; ii) a hierarquia de conjuntos de trabalho; e iii) o número de cópias invalidadas em cada operação de escrita em caches que seguem a política de invalidação em escrita.

Referências

HWANG, Kai. "Parallel Processing Applications". In "ADVANCED COMPUTER ARCHITECTURE PARALLELISM, SCALABILITY, PROGRAMMABILITY''. McGraw-Hill, 1993, p. 118-129.

Kofuji, S.T. et al. "Projeto Hipersistemas: Uma Visão Geral". Anais do Seminário de Supercomputação-Supercomp94. 1994.

Kofuji, S.T. et al. "O Multiprocessador SPADE'. Anais da III Jornada EPUSP-IEEE em Computação de Alto Desempenho. 1994.

SINGH, J.P. et al.: "SPLASH: Stanford Parallel Applications for Shared-Memory". Computer Architecture News, v.20, n. 1, p.5-44, March 1992.

VEENSTRA, Jack. E. & FOWLER, Robert J."MINT: A Front End for Efficient Simulation of Shared-Memory Multiprocessors". Proceedings of the 2nd International Workshop on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, p. 201-207, 1994.

DENNING, P.J. "Working Set Model for Program Behavior". Communications of ACM, v. 11, n. 6, p. 323-333, 1968.

SINGH, J.P. et al. "Working Sets, Cache Sizes, and Node Granularity lssues for Large-Scale Multiprocessors". Proceedings of the 20th Annual International Symposium on Computer Architecture, p.14-25, May 1993.

AGARWAL, A & GUPT A, A "Memory-reference characteristics of multiprocessor applications under MACH'. Proceedings of the ACM SIGMETRICS Conference on Measurements and Modeling of Computer Systems, p.215:225, 1988.

CHAIKEN, David L. "Coche Coherence Protocols for Large-Scale Multiprocessors". Department of Electrical Engineering and Computer Science, MIT, 1990. MsC Thesis

AGARWAL, A. et al. "An evaluation of directory schemes for coche coherence". Proceedings of the 15th International Symposium on Computer Architecture, p. 280-289, 1988.

CHAIKEN, David et al. "LimitLESS Directories: A Scalable Coche Coherence Scheme". Proceedings of the 4th International Conference on Architectural Support for Programrning Languages and Operating Systems, p. 224-234, April 1991.

WOOD, David A et al. "Mechanisms for Cooperative Shared Memory". Proceedings of the 20th Annual International Symposium on Computer Architecture, p. 156-167, 1993.

THAPAR, Manu. "CACHE COHERENCE FOR SCALABLE SHARED MEMORY MULTIPROCESSORS'. Computer Systems Laboratory, Stanford University, Tech. rep. CSL-TR-92-522, May 1992. PhD Thesis.

WEBER, Wolf-Dietrich & GUPTA, Anoop. "Analysis of Cache Invalidation Patterns in Multiprocessors". Proceedings of the 3rd International Conference on Architectural Support for Programming Languages and Operating Systems, p. 243-256, April 1989.

EGGERS, Susan & KATZ, Randy H. "A Characterization of Sharing in Parallel Programs and its Application to Coherence Protocol Evaluation". Proceedings of the 15th Annual International Symposium on Computer Architecture, p. 373-382, 1988.

AGARWAL, A & GUPTA, A. "Memory-reference characteristics of multiprocessor applications under MACH". Proceedings of the ACM SIGMETRICS Conference on Measurements and Modeling of Computer Systems, p.215:225, 1988.
Publicado
29/07/1995
Como Citar

Selecione um Formato
KOFUJI, Sergio Takeo; DELGADO, Martha Ximena Torres; ORDOÑEZ, Edward David Moreno; ZUFFO, João Antonio. Característica de Compartilhamento dos Programas Cholesky e MP3D. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 7. , 1995, Canela. Anais [...]. Porto Alegre: Sociedade Brasileira de Computação, 1995 . p. 507-521. DOI: https://doi.org/10.5753/sbac-pad.1995.19884.