Translation of hardware description languages to structured representation: a tool for digital system analysis
Resumo
SDS (System Data Structure), part of a digital synthesis system, is an internal representation that captures data/operation and communication/synchronization aspects from the behavioral specification of a digital system. SDS divides design information into two graphs that describe the data flow behavior and control timing behavior. This representation is useful for synthesis and validation/verification. This paper presents the translation process from the hardware description language VHDL to SDS, basically the transformation of a behavioral specification to a structured representation.
Palavras-chave:
system and high-level synthesis, behavioral design, control flow analysis, data flow analysis
Referências
LIPSETT, R.; SCHAEFER, C.; USSERY, C. VHDL: Hardware Description Language. Kluwer Academic Press, 1989.
SILVA Jr., Diógenes; PARKER, Alice C. SDS: a System Level Data Structure for Design Representation. IWLAS 97 - Intl. Workshop on Logic and Architecture Synthesis, Grenoble, France, December 1997.
VAUL, A VHDL Analyzer and Utility Library. http://www-dt.e-technick.uin-dortmund.de/~mvo/vaul/ University of Dortmund - Department of Electrical Engineering, AG SIV, 1994.
KNAPP, David; PARKER, Alice C. A Unified Representation for Design lnformation. Proc. of the LFIP Conf. on Hardware Description Languages, Aug. 1985.
WALKER, R. A.; THOMAS, Don E. Design Representation and Transformation in the System Architect 's Workbench, Proc. ICCAD-87, 1987.
DUTT, Nikil D.; HADLEY, T.; GAJSKI, D., D. An Intermediate Representation for Behavioral Synthesis, Proc. of DAC, 1990.
CHEN, Chi-Tung. A VHDL Language to DDS Data Structure Translator. Technical Report, Department of Electrical Engineering - System, University of Southern California, 1990.
KU, David; DE MICHELI, Giovanni. HardwareC- a Language for Hardware design (version 2.0). Technical Report CSL-TR-90-419, Stanford University, April 1990.
DE MICHELI, Giovanni ; KU, David; MAILHOT, F. ; TRUONG, T. The Olympus Synthesis System for Digital Design. IEEE Design and Test of Complller, October 1990.
THOMAS, D. E.; MOORBY, P. The VERILOG Hardware Description Language. Kluwer Academic Publishers, 1991.
IEEE. IEEE Standard VHDL Language Reference Manual. IEEE Computer Society Press, March 1997.
SILVA Jr., Diógenes; PARKER, Alice C. SDS: a System Level Data Structure for Design Representation. IWLAS 97 - Intl. Workshop on Logic and Architecture Synthesis, Grenoble, France, December 1997.
VAUL, A VHDL Analyzer and Utility Library. http://www-dt.e-technick.uin-dortmund.de/~mvo/vaul/ University of Dortmund - Department of Electrical Engineering, AG SIV, 1994.
KNAPP, David; PARKER, Alice C. A Unified Representation for Design lnformation. Proc. of the LFIP Conf. on Hardware Description Languages, Aug. 1985.
WALKER, R. A.; THOMAS, Don E. Design Representation and Transformation in the System Architect 's Workbench, Proc. ICCAD-87, 1987.
DUTT, Nikil D.; HADLEY, T.; GAJSKI, D., D. An Intermediate Representation for Behavioral Synthesis, Proc. of DAC, 1990.
CHEN, Chi-Tung. A VHDL Language to DDS Data Structure Translator. Technical Report, Department of Electrical Engineering - System, University of Southern California, 1990.
KU, David; DE MICHELI, Giovanni. HardwareC- a Language for Hardware design (version 2.0). Technical Report CSL-TR-90-419, Stanford University, April 1990.
DE MICHELI, Giovanni ; KU, David; MAILHOT, F. ; TRUONG, T. The Olympus Synthesis System for Digital Design. IEEE Design and Test of Complller, October 1990.
THOMAS, D. E.; MOORBY, P. The VERILOG Hardware Description Language. Kluwer Academic Publishers, 1991.
IEEE. IEEE Standard VHDL Language Reference Manual. IEEE Computer Society Press, March 1997.
Publicado
10/09/2001
Como Citar
PEIXOTO, Daniela C.; SILVA JR., Diógenes; MATA, José M.; COELHO JR., Claudionor N.; FERNANDES, Antônio O..
Translation of hardware description languages to structured representation: a tool for digital system analysis. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 13. , 2001, Pirenópolis.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
2001
.
p. 76-81.
DOI: https://doi.org/10.5753/sbac-pad.2001.22196.
