COMMUNION: towards a cooperative strategy for high-performance memory management

  • Edson Toshimi Midorikawa USP
  • Liria Matsumoto Sato USP

Resumo


The memory system is the most critical component of modern high-performance computer systems, because of its growing inability to keep up with the processor requests. Technological trends have produced a large and growing gap between CPU speeds and DRAM speeds. Many researches have focused this memory system problem, including program optimizing techniques, data locality enhancement, hardware and software prefetching, decoupled architectures, mutithreading, speculative loads and execution. These techniques have achieved a relative suceess, but they focus only one component in the hardware or software systems. We present here a new strategy for memory management in high-performance computer systems, named COMMUNION. The basic idea behind this strategy is cooperation. We introduce some possibilities of interaction among system programs that are responsible to generate and execute application programs. So, we investigate two specific interactions: between the compiler and the operating system, and among the compiling system components. The experimental results show that it's possible to achieve improvements of about 10 times in execution time, and about 5 times in memory demand. In the interaction between compiler and operating system, named Compiler-Aided Page Replacement (CAPR), we achieved a reduction of about 10% in the space-time product, with an increase of only 0.5% in the total execution time. All these results show that it's possible to manage main memory with better efficiency than what is provided by current systems.

Referências

BANERJEE, U. Loop parallelization. Kluwer Academic Publishers, 1994.

COCKCROFT, A. Sun performance and tuning: sparc & solaris. Prentice-Hall, 1995.

EISENBEIS, C. et alii. A strategy for array management in local memory. Rapports de Recherche n° 1262. INRIA, France. 1990.

FRANKLIN, M. A. et alii. Anomalies with variable partition paging algorithms. Communicatlons of the ACM, 21:3, p.232-236, 1978.

KREMER, U. Automatic data layout for distributed memory machines. Ph.D. Thesis. Computer Science Department, Rice University. 1995.

MALKAWI, M. I. Compiler directed memory management for numerical programs. Ph.D. Thesis. Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign. 1986.

MIDORIKAWA, E. T. Análise da otimização de acessos à memória. In: Proceedings of 6th Brazilian Symposium on Computer Architecture - High Performance Computing, p.37-52, Caxambu, MG, Brazil, August 1994.

MIDORIKA WA, E. T. et alii. Um sistema integrado para otimização automática de paralelismo e localidade de dados. In: Proceedings of 7th Brazilian Symposium on Computer Architecture - High Performance Computing, p.523-537, Canela, RS, Brazil, July 1995.

MIDORIKA W A, E. T. Uma nova estratégia para a gerência de memória para sistemas de computação de alto desempenho. Ph.D. Qualification Exam. University of São Paulo, São Paulo, Brazil 1997.

C. D. Polychronopoulos. Parallel programming and compilers. Kluwer Academic Publishers, 1988.

S. Takahashi et alii. Análise do padrão de acessos e otimização de localidade em sistemas de computação de alto desempenho. In: Proceedings of PANEL'95 (CTIC' 95), v.2, p.1479, Canela, RS, Brazil, July 1995.

TANENBAUM, A. S. & WOODHULL, A. S. Operating systems: design and implementatlon. 2nd. Ed., Prentice-Hall, 1997.

VEENSTRA, J. E. & FOWLER, R. J. MINT tutorial and user manual. Technical report 452, Computer Science Department, University of Rochester, 1994.

WOLFE, M. High performance compilers for parallel computing. Addison-Wesley, 1996.
Publicado
07/10/1997
Como Citar

Selecione um Formato
MIDORIKAWA, Edson Toshimi; SATO, Liria Matsumoto. COMMUNION: towards a cooperative strategy for high-performance memory management. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 9. , 1997, Campos do Jordão/SP. Anais [...]. Porto Alegre: Sociedade Brasileira de Computação, 1997 . p. 509-524. DOI: https://doi.org/10.5753/sbac-pad.1997.22645.