Requisitos de Hardware para Processamento a Fluxo de Dados Distribuído

  • Eduardo Marques USP / UFSCar
  • Rosana C. M. G. Gonçalves UNICAMP / UFSCar
  • Claudio Kirner UFSCar / USP / ITA / UFRJ

Resumo


Este trabalho apresenta uma discussão geral de processamento a fluxo de dados num ambiente distribuído, proporcionado pelo Computador Paralelo Estruturado Recursivamente (CPER). Apresenta-se também os requisitos básicos de hardware envolvendo pesquisa em memória, comunicação, processamento e tolerância a falhas.

Referências

ABRAMSON, D.A. & EGAN, G.K. - An Overview of the RMIT/CSIRO Parallel Systems Architecture Project. The Australian Computer Journal, 20(3): 113-121. 1988.

AHUJA, S.R. & ROBERTS, C.S. - An Associative/Parallel Processor for Partial Match Retrieval Using Superimposed Codes. Annual Symposium on Computer Architecture, 7. USA. p. 218-227.

ALMASI, G.S. & GOTTLIEB, A. Highly Parallel Computing. Redwood City, The Benjamin/Cummings, 1989. 520 p.

AMORIM, C.L. & BARBOSA, V.C. & FERNADES, E.S.T. Uma Introdução à Computação Paralela e Distribuída. Campinas , IV Escola de Computação, 1988. 258 p.

ANDREWS, W. - ASIC Memories: Bigger, Faster, and Customized. Computer Design, 27(18):44-62. 1988.

ARVIND & NIKHIL, R.S. Executing a Program on the MIT Tagged-Token Dataflow Architecture. Lecture Noles in Computer Science, 259: 1-29. 1987.

BURKOWSKI, F.J - A Hardware Hashing Scheme in the Design of a Multiterm String Comparator. IEEE Transactions on Computers, c-31(9): 825-834. 1982.

BURKOWSKI, F.J.A Multi-user Data Flow Architecture. Annual Symposium on Computer Architecture, 8. Minneapolis, USA, 1981. p. 327-340.

BURSKY, D. - Floating - Point Math Chip Delivers 200 MFLOPS Peak. Electronic Design, 38(4):51-55. 1990.

CALUWAERTS,L.J. & DEBACKER, J. & PEPERSTRAETE, J.A. - A Data Flow Architecture with a Paged Memory System. Annual International Symposium on Computer Architecture, 9. USA, 1982. p. 120-127.

COLOMB, R.M. - Table Searching Using a Content-Addressable Memory. The Australian Computer Journal, 20 (3):105-112. 1988.

D'AREZZO, V.M. & KIRNER, C. - Dataflow in Distributed Environment. - SCCC International Conference on Computer Science, 10. Santiago, Chile, 1990. 10 p.

D'AREZZO, V.M. & KIRNER, C. - Mapeamento de Operações em uma Máquina a Fluxo de Dados Dinâmica. Congresso Nacional de Informática, 22. Sao Paulo, SP, 1989. p. 186-194.

DA SILVA, J.G.D. - The Matching Unit of the Manchester Data-Flow Computer: a Pseudo-Associative Store with Hardware Hashing. Manchester, University of Manchester, 1982. Ph.D. Thesis. 183 p.

DECEGAMA, A.L. - The Technology of Parallel Processing: Parallel Processing Architectures and VLSI Hardware. Engl. Cliffs, Prentice-Hall, Vol 1, 1989. 478 p.

DENNIS, J.B. & MISUNAS D.P. - A Preliminary Architecture for a Basic Data-Flow Processor. Annual Symposium on Computer Architecture, 2. Houston, USA, 1974. p. 126-132.

ENBODY, R.J. & DU, H.C. - Dynamic Hashing Schemes. ACM Computing Surveys, 20 (2):85-113. 1988.

GONÇALVES,R.C.M.G. & KIRNER, C. - Simulação na Construção de Protótipos de Sistemas Distribuídos. Congresso Nacional de Informática, 22. São Paulo, SP, 1989. p.706713.

GONÇALVES, R.C.M.G. - CPER-1: Uma Arguitetura para Exploração de Paralelismo Híbrido. São Carlos, Universidade Federal de São Carlos, 1989. Proposta de Dissertação de Mestrado. 96 p.

GOTO, E. & IDA, T. & GUNJI, T. - Parallel Hashing Algorithms. Information Processing Letters, 6 (1):8-13. 1977.

GURD, J.R. & KIRKHAM, C.C. & WATSON, I. The Manchester Prototype Dataflow Computer. Communications of ACM, 28 (1): 34-52. 1985.

GURD, J.R. et al - Fine-Grain Parallel Computing: The Dataflow Approach. Lecture Notes in Computer Science, 272: 82-152. 1987.

HIRAKI, K. & NISHIDA, K. & SHIMADA, T. - Evaluation of Associative Memory Using Parallel Chained Hashing. IEEE Transactions on Computers, c-33(9):851-855. 1984.

HIRAKI, K. & SHIMADA, T. & NISHIDA, K. - A Hardware Design of the Sigma-1. A Data Flow Computer for Scientific Computations. International Conference on Parallel Processing, 1984. Michigan, USA, 1984. p. 524-531.

HWANG, K. & BRIGGS, F.A. Computer Architecture and Parallel Processing. New York, McGraw-Hill, 1984. 846 p.

INMOS Corp. - The Transputer Databook. 72TRN20301. 2nd. ed., 1989. 582 p.

ITO, N. et al - The Architecture and Preliminary Evaluation Results of The Experimental Parallel Inference Machine PIM-D. Annual International Symposium on Computer Architecture, 13. Tokyo, Japan, 1986. p. 149-156.

JEFFERY, T. - The uPD7281 Processor. Byte, 10 (12):237-246. 1985.

KING,W.K. - Design of an Associative Memory. IEEE Transactions on Computers, c20(6):671-674. 1971.

KIRNER, C. & BAENA, W.C. - Projeto de um Ambiente Tolerante a Falhas para Implementação de Sistemas Operacionais Distribuídos. Congresso Nacional de Informática,21. Rio de Janeiro, RJ, 1988. p.686-695.

KIRNER, C. - Ambiente para Desenvolvimento de Computadores Paralelos. JAIIO, 19, CLAIO, 5, Buenos Aires, Argentina, 1990. 13 p.

KIRNER, C. - Design of a Recursively Structured Parallel Computer. Annual Computer Science Conference, 17. Louisville, USA, 1989.

KIRNER, C. - Projeto Centauro de Computação Paralela: Uma Alternativa para Processamento de Alta Velocidade. Submetido ao II SBAC-PP, Rio de Janeiro, RJ, PUC/RJ, nov. 1990.

KIRNER, C. & MARQUES, E. - Design of a Distributed System Support Based on a Centralized Parallel Bus. ACM Computer Architecture News, 14 (4): 15-26. 1986.

KISHI, M. & YASUHARA, H. & KAWAMURA, Y. - DDDP: A Distributed Data Driven Processor. Annual International Symposium on Computer Architecture, 10. Stockholm, Sweden, 1983. - p. 236-242.

KNUTH, D.E.The Art of Computer Programming. Reading, Addison-Wesley, Vol. 3, 1973. 722 p.

KOHN,L. & MARGULIS, N. - Introducing the Intel i860 64-bit Microprocessor. IEEE Micro, 9(4): 15-30. 1989.

KOHONEN, T. Content Addressable Memories. Berlin, Springer-Verlag, 2 nd. Ed., 1987. 388 p.

KOMORI, S. et al - The Data-Driven Microprocessor. IEEE Micro, 9(3):45-59. 1989.

KRONLÖF, K. - Execution Control and Memory Management of a Data Flow Signal Processor. Annual International Symposium on Computer Architecture, 10. Stockholm, Sweden, 1983. p. 230-235.

KRVATRACHUE, B. & LEWIS, T. - Grain Size Determination for Parallel Processing. IEEE Software, 5(1):23-32. 1988.

LEMOS, F.E. & RUGGIERO, W.V. - Um Processador de Propósito Geral Dirigido pelo Fluxo de Dados. Congresso da Sociedade Brasileira de Computação, 6. Recife, PE, 1986. p. 385-396.

LITWIN, W. & SAGIV, Y. & VIDYASANKAR, K. - Concurrency and Trie Hashing. Acta Informática, 26 (7):597-614. 1989.

MARQUES, E. & KIRNER, C. & OBAC RODA, V. - Mecanismos de Tolerância a Falhas num Subsistema de Comunicação Baseado em Barramento Paralelo Centralizado. Simpósio em Sistemas de Computadores Tolerantes a Falhas, 2. Campinas, SP, UNICAMP, 1987. p. 131-149.

MARQUES, E. - Projeto de uma Rede Local de Computadores de Alta Velocidade. São Carlos, Universidade de São Paulo, ICMSC, 1988. Dissertação de Mestrado. 111 p.

NORRIE, C. - Supercomputers for Superproblems: An Architectural Introduction. Computer 17,(3): 62-74. 1984.

PARHAMI, B. - Associative Memories and Processors: An Overview and Selected Bibliography. Proceedings of the IEEE, 61(6):722-730. 1973.

RAMAMOHANARAO, K. & SACKS-DAVIS, R. - Hardware Address Translation for Machines with a Large Virtual Memory. Information Processing Letters, 13(1):23-29. 1981.

SHIPPEN, G.B. & ARCHIBALD, J.K. - A Tagged Token Dataflow Machine For Computing Small, Iterative Algorithms. Computer Architecture News, 15(6):9-18. 1987.

SHIMADA, T. et al - Evaluation of a Prototype Data Flow Processor of the Sigma-1 for Scientific Computations. Annual International Symposium on Computer Architecture, 13. Tokyo, Japan, 1986. - p. 226-234.

SILVA, J.L. & KIRNER,C. - Fault-Tolerant Dataflow Processing in a Parallel Computer. SCCC Internatinal Conference on Computer Science, 10. Santiago, Chile, 1990. 10 p.

SILVA, J.L. & KIRNER, C. - Suporte para Programação "Dataflow" em um Computador Paralelo. Congresso Nacional de Informática, 22. São Paulo, SP, 1989. p. 135-143.

SILVA, J.L. & KIRNER, C. - Development of the Basic Software of a Tagged-Token Dataflow Machine. SCCC International Conference on Computer Science, 9. Santiago, Chile, 1989. p. 217-229.

SNADER, J.C. - Look it up Faster with Hashing. Byte, 12 (1): 129-144. 1987.

SRINI, V.P. An Architectural Comparison of Dataflow Systems. Computer,19 (3): 68-88. 1986.

THURBER, K.J. & WALD, L.D. - Associative and Parallel Processors. ACM Computin Surveys, 7(4):215-225. 1975.

TRELEAVEN, P.C. - Parallel Architecture Overview. Parallel Computing, 8 (1-3): 59-70. 1988.

TRELEAVEN, P.C. & LIMA, I.G. - Future Computers: Logic, Data Flow,..., Control Flow? Computer, 17 (3):47-58. 1984.

TRELEAVEN, P.C. & BROWNBRIDGE, D.R. & HOPKINS, R.P. - Data-Driven and Demand-Driven Computer Architecture. ACM Computing Surveys, 15 (1): 93-143. 1982.

VEEN, A.H. - Dataflow Machine Architecture. ACM Computing Surveys, 18 (4): 365-396. 1986.

WILSON, R. - Choosing a Microprocessor: Designers Take Many Paths to the Best Solution. Computer Design, 27(4):59-73. 1988.

YAU, S.S. & FUNG, H.S. - Associative Processor Architecture - A Survey. ACM Computing Surveys, 9(1): 3-27. 1977.
Publicado
07/11/1990
Como Citar

Selecione um Formato
MARQUES, Eduardo; GONÇALVES, Rosana C. M. G.; KIRNER, Claudio. Requisitos de Hardware para Processamento a Fluxo de Dados Distribuído. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 3. , 1990, Rio de Janeiro/RJ. Anais [...]. Porto Alegre: Sociedade Brasileira de Computação, 1990 . p. 65-81. DOI: https://doi.org/10.5753/sbac-pad.1990.23109.