Characterizing Prefetchers using CacheObserver

  • Guillaume Didier DGA / Univ. Rennes / CNRS / IRISA / DIENS / Ecole normale supé rieure PSL
  • Clémentine Maurice Univ. Lille / CNRS / Inria
  • Antoine Geimer Univ. Lille / CNRS / Inria
  • Walid J. Ghandour Univ. Lille / CNRS / Inria

Abstract

Hardware prefetchers are mostly undocumented micro-architectural components of the cache hierarchy, with performance and security implications. Intel CPUs feature four named prefetchers whose behaviors are generally unknown. We build CacheObserver, a generic framework to study prefetchers on Intel CPUs and the first to use the Flush+Flush primitive, unlike previous studies using Flush+Reload. We apply this framework to characterize the L2 Stream prefetcher on the Intel Whiskey and Coffee Lake micro-architectures and uncover the behavior of the L2 Stream prefetcher upon the first few accesses in a page. We also uncover interactions at the L2 level between the Stream and the Adjacent Cache Line prefetchers.
Published
2022-11-02
How to Cite
DIDIER, Guillaume et al. Characterizing Prefetchers using CacheObserver. Proceedings of the International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), [S.l.], p. 170-179, nov. 2022. ISSN 0000-0000. Available at: <https://sol.sbc.org.br/index.php/sbac-pad/article/view/28244>. Date accessed: 17 may 2024.