Efficient Hardware for Modular Exponentiation Using the Sliding-Window Method with Variable-Length Partitioning

• Nadia Nedjah UERJ
• Luiza de Macedo Mourelle UERJ

Abstract

Modular exponentiation is a basic operation in various applications, such as cryptography. Generally, the performance of this operation has a tremendous impact on the efficiency of the whole application. Therefore, many researchers devoted special interest to providing smart methods and efficient implementations for modular exponentiation. One of these methods is the sliding-window method, which pre-processes the exponent into zero and non-zero partitions. Zero partitions allow for a reduction of the number of modular multiplications required in the exponentiation process. In this paper, we devise a novel hardware for computing modular exponentiation using the slidingwindow method. The partitioning strategy used here allows variable-length non-zero partitions, which increases the average number of zero partitions and so decreases that of non-zero partitions. The implementation is efficient when compared against related existing hardware implementations.

Keywords: Hardware, Partitioning algorithms, Computer architecture, High performance computing, Systems engineering and theory, Telecommunication computing, Public key cryptography, NP-complete problem, Heart