High Performance by Exploiting Information Locality through Reverse Computing

• Mouad Bahi INRIA Saclay-Ile-de-France / LRI, University Paris Sud 11
• Christine Eisenbeis INRIA Saclay-Ile-de-France / LRI, University Paris Sud 12

Resumo

In this paper we present performance results for our register rematerialization technique based on reverse recomputing. Rematerialization adds instructions and we show on one specifically designed example that reverse computing alleviates the impact of these additional instructions on performance. We also show how thread parallelism may be optimized on GPUs by performing register allocation with reverse recomputing that increases the number of threads per Streaming Multiprocessor (SM). This is done on the main kernel of Lattice Quantum Chromo Dynamics (LQCD) simulation program where we gain a 10.84% speedup.

Palavras-chave: Registers, Frequency modulation, Parallel processing, Instruction sets, Assembly, Pipelines, Optimization, thread-level parallelism, rematerialization, reversible computing