Dealing with Reduction Operations Using Transactional Memory
Abstract
Reductions are common operations in many real-world applications that may be responsible for a significant part of the computing time. Modern compilers implement parallel reductions by combining privatization, atomic operations and/or locks. In this paper we analyze how to address reductions in the transactional memory (TM) model, which is flourishing together with the modern shared-memory multicore-based parallel architectures. With this purpose, this paper studies which support needs to be added to a TM system to deal with reductions as a special case of conflicting memory accesses.
Keywords:
Arrays, Privatization, Synchronization, Multicore processing, Program processors, Hardware, Transactional memory, reduction operations, partial reductions, selective privatization
Published
2013-10-23
How to Cite
GONZALEZ-MESA, Miguel A.; QUISLANT, Ricardo; GUTIERREZ, Eladio; PLATA, Oscar.
Dealing with Reduction Operations Using Transactional Memory. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 25. , 2013, Porto de Galinhas/PE.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
2013
.
p. 128-135.
