Model and simulation of Warpage in packaged IC strips after Mold Array Process

• Jose Ramirez Eldorado Research Institute
• Ricardo Yoshioka Eldorado Research Institute
• Carolina Nunes Eldorado Research Institute
• Igor Fernandes Namba Eldorado Research Institute
• Claudemir Coral Eldorado Research Institute

Resumo

The residual stress in the different layers of the IC package causes warpage in the device, which can lead to a reduction in productivity and reliability. The stress and deformation are related to the material used for packaging and to the geometry of the packaged device. In this paper, an analytical model for the warpage in MAP-BGA strips is developed, these models are intended to provide a quick warpage estimation after the compression molding process. A Finite Element Method (FEM) of the packaged is presented and the simulation results are compared to the analytical model. Both models are validated against experimental observation of samples strips packaged using compression molding process. A commercial Epoxy Molding Compound (EMC) with different thicknesses and different amounts of silicon dies are used to observe the behavior of the curvature for different packaging design parameters. The behavior of the experimental results fits the models’ predictions. As result, the combination of the simplified model and the Finite Element Analyses (FEA) are an adequate methodology for material selection and process design and to estimate the mechanical behavior of the packaged MAP strip, which can be used to validate the packaged device, reducing the cost of prototyping.

Palavras-chave: Strain, Electromagnetic compatibility, Substrates, Silicon, Finite element analysis, Integrated circuit modeling, Strips, IC Packaging, Warpage