Generating Optimized Multicore Accelerator Architectures
Resumo
Designing multicores to achieve a balance between high performance, area and energy efficiency is still a challenge given the large diversity of embedded applications. In this scenario, combining different hardware processing elements at design time to balance the aforementioned constraints is crucial to provide an efficient design. Reconfigurable architectures (RAs) are flexible platforms being able to save energy and improve performance due to their reconfiguration and parallelism exploitation capability. But a key question is whether the combination of processors and RAs can provide performance and energy improvements as expected at the price of extra area and power. In this work, we propose a new methodology to generate different heterogeneous multicore configurations that comprise GPPs and reconfigurable architectures to optimize a given nonfunctional requirement (e.g. performance and energy) under certain constraints. We combined superscalar processors with coarse grained reconfigurable architectures, and we generated optimized multicores considering three scenarios. The first one is a combination of cores and RAs that achieves the highest performance possible for a set of benchmarks. The second one is a combination of cores and RAs limited by a performance threshold and the third one is limited by an energy budget. Our experiments show that the optimized multicore achieved a speedup of more than 2.5x for certain applications. With a relinquish of 10% of speedup, it was possible to save more than 11% in energy and with an energy saving budget of 20% one can save more than 30% in area.
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