FPGA-based Accelerator to Speed-up Seismic Applications

• V. W. C. Medeiros UFPE
• R. C. F. Rocha UFPE
• A. P. A. Ferreira UFPE
• J. C. B. L. Correia UFPE
• J. P. F. Barbosa UFPE
• A. G. Silva-Filho UFPE
• M. E. Lima UFPE
• Rodrigo Gandra Petrobrás
• Ricardo Bragança Petrobrás

DOI: https://doi.org/10.5753/wscad.2011.17269

Abstract

Hardware accelerators such as GPGPUs and FPGAs have been used as an alternative to the conventional CPU in scientific computing applications and have shown significant performance improvements. In this context, this work presents an FPGA-based solution that explores efficiently the reuse of data and parallelization in both space and time domains for the first computational stage of the RTM (Reverse Time Migration) algorithm, the seismic modeling. We also implemented the same algorithm for CPU architectures and GPGPU and our results demonstrate that the FPGA-based approach can be a viable solution to improve performance. Experimental results show a speedup of 1.668 times compared with GPGPU and 25.79 times compared to CPU. Results were evaluated with the Marmousi velocity model, considering the same parameters in all approaches.

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