Processador de Rede com Suporte a Multi-protocolo e Topologias Dinâmicas
Abstract
This paper presents a network processor with dedicated micro-architecture and instruction set optimized to be used in computer networks (SAN, LAN, WAN). The large use of routers and other gateways, that are responsible for traffic and bottleneck in networks, has contributed to better processors. This research shows a new concept of processor that supports multi-protocol and dynamic topology using optimized and application specific micro-architecture and instruction set. Some characteristics and results are compared with commercial general-purpose and network processors.
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