HPyC-FPGA - Integração de Aceleradores em FPGA de Alto Desempenho com Python para Jupyter Notebooks

Lucas B. da Silva; Jeronimo Costa Penha; Dener V. Ribeiro; Alysson Silva; José Augusto M. Nacif; Ricardo Ferreira

doi:10.5753/wscad.2022.226383

Lucas B. da Silva UFV
Jeronimo Costa Penha UFV / CEFET-MG
Dener V. Ribeiro UFV
Alysson Silva UFV
José Augusto M. Nacif UFV
Ricardo Ferreira UFV

DOI: https://doi.org/10.5753/wscad.2022.226383

Resumo

O desenvolvimento de aceleradores em FPGAs (Field Programmable Gates Arrays) ainda é um desafio. Recentemente, o ambiente PYNQ da Xilinx possibilitou a integração de código Python com aceleradores em FPGA. A maioria dos exemplos está voltada para placas de prototipação utilizadas no desenvolvimento de aplicações embarcadas. Este artigo apresenta o algoritmo K-means de aprendizado de máquina não supervisionado como estudo de caso. A principal contribuição deste trabalho é o encapsulamento de 3 aceleradores acoplados com PYNQ usando o ambiente Jupyter Notebook. A avaliação foi realizada em uma máquina de alto desempenho utilizando um FPGA Alveo U55C com memória HBM (High Bandwidth Memory). Os resultados são promissores, além de mostrar as facilidades de uso do FPGA de forma encapsulada, o ganho de desempenho foi de uma a duas ordens de grandezas em comparação a um sistema com dois processadores Xeon(R) Silver 4210R com 10 núcleos cada, executando a etapa de classificação do algoritmo K-means.

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