Gerenciamento de Recursos para Execução Energeticamente Eficiente de Workloads em Data Centers com CPUs Híbridas
Resumo
Processadores multicore assimétricos (AMPs) combinam cores de alto desempenho e de eficiência energética sob uma arquitetura de conjunto de instruções compartilhada e vêm sendo adotados em datacenters para cargas de trabalho cada vez mais intensivas. Entretanto, AMPs desafiam os mecanismos convencionais de gerenciamento de containers, que normalmente assumem cores homogêneos. Neste artigo, propomos o COREWISE, um gerenciador adaptativo para alocação energeticamente eficiente de workloads conteinerizados em sistemas AMPs. Com base em profiling, o COREWISE adapta o paralelismo em nível de thread de cada aplicação (reduzindo o número de threads quando necessário), classifica alocações viáveis de cores pelo Energy-Delay Product (EDP) e aplica uma estratégia cooperativa em três fases: (i) alocação best-fit orientada por prioridade, (ii) redução cooperativa e (iii) redistribuição de cores residuais. Avaliamos o COREWISE com kernels do NAS Parallel Benchmark Suite executados em Docker sobre um Intel Core i9-12900K (Alder Lake), em um cenário de alta contenção com 7 configurações candidatas por workload e 50 containers concorrentes. Em comparação com o baseline serial, o COREWISE reduziu o EDP em 91,2% em média, superando heurísticas clássicas para containers em 56,51% e uma variante que desconsidera a heterogeneidade em 49,92%.Referências
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Schöne, R., Velten, M., Hackenberg, D., and Ilsche, T. (2024b). Energy efficiency features of the intel alder lake architecture. In ICPE, pages 95–106.
Shimchenko, M., Österlund, E., and Wrigstad, T. (2024). Scheduling garbage collection for energy efficiency on asymmetric multicore processors. arXiv preprint arXiv:2403.02200.
Suleman, M. A., Qureshi, M. K., and Patt, Y. N. (2008). Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on cmps. ACM Sigplan Notices, 43(3):277–286.
Teabe, B., Wapet, P. L., Tchana, A., and Hagimont, D. (2017). Dealing with performance unpredictability in an asymmetric multicore processor cloud. In European Conference on Parallel Processing, pages 332–344. Springer.
Zhang, H. and Hoffmann, H. (2016). Maximizing performance under a power cap: A comparison of hardware, software, and hybrid techniques. ACM SIGPLAN Notices, 51(4):545–559.
Bailey, D. H., Barszcz, E., Barton, J. T., et al. (1991). The NAS parallel benchmarks. Int. J. High Perform. Comput. Appl., 5(3):63–73.
Balla, D., Simon, C., and Maliosz, M. (2020). Adaptive scaling of Kubernetes pods. In Proceedings of the IEEE/IFIP Network Operations and Management Symposium (NOMS), pages 1–5. IEEE.
Bilbao, C., Saez, J. C., and Prieto-Matias, M. (2023). Flexible system software scheduling for asymmetric multicore systems with pmcsched: A case for intel alder lake. CCPE, page e7814.
da Silva, V. S., de Lima, E. C., Schwarzrock, J., Rossi, F. D., Luizelli, M. C., Beck, A. C. S., and Lorenzon, A. F. (2024). Synergistically rebalancing the edp of container-based parallel applications. IEEE Transactions on Parallel and Distributed Systems, 35(3):484–498.
Dalakoti, V. and Chakraborty, D. (2022). Apple m1 chip vs intel (x86). IJRD, 7(5):207–211.
David, H., Gorbatov, E., Hanebutte, U. R., Khanna, R., and Le, C. (2010). Rapl: Memory power estimation and capping. In Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design, pages 189–194.
Expósito, R. R., Taboada, G. L., Ramos, S., Touriño, J., and Doallo, R. (2013). Performance analysis of hpc applications in the cloud. Future Generation Computer Systems, 29(1):218–229.
Gonzalez, R. and Horowitz, M. (1996). Energy dissipation in general purpose microprocessors. IEEE J. Solid-State Circuits, 31(9):1277–1284.
Higgins, J., Holmes, V., and Venters, C. (2015). Orchestrating docker containers in the hpc environment. In International Conference on High Performance Computing, pages 506–513. Springer.
Kwon, Y., Kim, C., Maeng, S., and Huh, J. (2011a). Virtualizing performance asymmetric multi-core systems. In Proceedings of the 38th Annual International Symposium on Computer Architecture (ISCA), pages 45–56, New York. ACM.
Kwon, Y., Kim, C., Maeng, S., and Huh, J. (2011b). Virtualizing performance asymmetric multi-core systems. ACM SIGARCH Computer Architecture News, 39(3):45–56.
Laguna, F. N., Moori, M. K., Rocha, H. M. G. D. A., and Beck, A. C. S. (2026). Energy-aware tuning of pthreads and openmp applications for asymmetric multicore architectures. In 2026 39th SBC/SBMicro/IEEE Symposium on Integrated Circuits and Systems Design (SBCCI), pages 1–5. IEEE.
Liu, P. and Guitart, J. (2022). Performance characterization of containerization for hpc workloads on infiniband clusters: an empirical study. Cluster Computing, 25(2):847–868.
Lorenzon, A. F., De Oliveira, C. C., Souza, J. D., and Beck, A. C. S. (2018). Aurora: Seamless optimization of openmp applications. TPDS, 30(5):1007–1021.
Moori, M. K., Lorenzon, A. F., Rocha, H. M. G. d. A., and Beck, A. C. S. (2025). Gaamp: Automatic thread count/affinity and dvfs tuning for asymmetric multicores. In 2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), volume 1, pages 1–6.
Saez, J. C. and Prieto-Matias, M. (2022). Evaluation of the intel thread director technology on an alder lake processor. In ACM SIGOPS APSYS, pages 61–67.
Salami, B., Noori, H., and Naghibzadeh, M. (2022). Online energy-efficient fair scheduling for heterogeneous multi-cores considering shared resource contention. The Journal of Supercomputing, pages 1–20.
Schöne, R., Ilsche, T., Bielert, M., Gocht-Zech, A., and Hackenberg, D. (2024a). Energy efficiency features of the Intel Alder Lake architecture. In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), pages 146–155. IEEE.
Schöne, R., Velten, M., Hackenberg, D., and Ilsche, T. (2024b). Energy efficiency features of the intel alder lake architecture. In ICPE, pages 95–106.
Shimchenko, M., Österlund, E., and Wrigstad, T. (2024). Scheduling garbage collection for energy efficiency on asymmetric multicore processors. arXiv preprint arXiv:2403.02200.
Suleman, M. A., Qureshi, M. K., and Patt, Y. N. (2008). Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on cmps. ACM Sigplan Notices, 43(3):277–286.
Teabe, B., Wapet, P. L., Tchana, A., and Hagimont, D. (2017). Dealing with performance unpredictability in an asymmetric multicore processor cloud. In European Conference on Parallel Processing, pages 332–344. Springer.
Zhang, H. and Hoffmann, H. (2016). Maximizing performance under a power cap: A comparison of hardware, software, and hybrid techniques. ACM SIGPLAN Notices, 51(4):545–559.
Publicado
03/11/2026
Como Citar
MOORI, Marcelo K.; LAGUNA, Felipe N.; ROCHA, Hiago Mayk G. de A.; BECK, Antonio Carlos S..
Gerenciamento de Recursos para Execução Energeticamente Eficiente de Workloads em Data Centers com CPUs Híbridas. In: SIMPÓSIO EM SISTEMAS COMPUTACIONAIS DE ALTO DESEMPENHO (SSCAD), 27. , 2026, Natal/RN.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
2026
.
p. 441-454.
DOI: https://doi.org/10.5753/sscad.2026.34962.
