Simulador do Algoritmo de Tomasulo com Conjunto de Instruções RISC-V
Abstract
One of the most impactful creations in the field of processors was the concept of the superscalar pipeline, whose goal was to minimize bottlenecks and meet the demands of its users, ensuring an increase in instructions per cycle. However, as a trade-off, it introduced greater architectural complexity and the need for better control over instruction dependencies. To address this issue, Robert Tomasulo devised an algorithm that is still in use today. In the mentioned article, the authors present a simulator in the C language of the Tomasulo’s algorithm using the RISC-V instruction set. This simulator demonstrates the step-by-step execution of the structures envisioned by Tomasulo, the analysis of dependencies between instructions and support for branch instructions.
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