ProcessorCI: Continuous Integration for RISC-V processors on FPGAs

• Julio N. Avelar UNICAMP
• Victor P. Lago UNICAMP
• Ângelo R. P. Malaguti UNICAMP
• Rodolfo Azevedo UNICAMP

DOI: https://doi.org/10.5753/sscad_estendido.2024.244745

Abstract

This paper presents an automated infrastructure for the verification of RISC-V processors, using continuous integration techniques combined with FPGAs from multiple vendors, such as Altera/Intel, Xilinx/AMD, Gowin, and Lattice. We designed a robust and scalable environment that facilitates early detection of faults in various RISC-V processor implementations, ensuring compliance with ISA specifications. Preliminary results demonstrate the effectiveness of the approach, highlighting the methodology’s ability to quickly identify errors and gather essential data for processor selection and verification.

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