Hardware Accelerator for Dictionary-Based Compression of MMP Algorithm

  • Vanderson de L. Reis Instituto Federal do Amazonas / Universidade Federal do Amazonas
  • Edward David Moreno Universidade Federal de Sergipe
  • Murilo B. de Carvalho Universidade Federal Fluminense


The MMP is an algorithm for image compression which uses the multiscale method of recurrent patterns, based on dictionary. The MMP has compression ratio at the same level of others compression algorithms which are based on transforms, having been detached to images with high frequency, however its execution time has been shown high, by repeated searches of these patterns in dictionaries. In this paper we propose a parallel and dedication hardware to accelerate the execution of MMP, and it is implemented in FPGA, which performs the critical function in 340ns, achieving a speedup of 300 over software version.

Palavras-chave: Image coding, Hardware, Software, Transform coding, Pixel, Wavelet transforms, Field programmable gate arrays, Image Compression, Pattern Multiscale Matching and Recurring, Embedded Systems, Partition H/S, FPGA
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REIS, Vanderson de L.; MORENO, Edward David; CARVALHO, Murilo B. de. Hardware Accelerator for Dictionary-Based Compression of MMP Algorithm. In: SIMPÓSIO EM SISTEMAS COMPUTACIONAIS DE ALTO DESEMPENHO (SSCAD), 11. , 2010, Petrópolis. Anais [...]. Porto Alegre: Sociedade Brasileira de Computação, 2010 . p. 48-55.