Poluição de Cache e Thrashing em Aplicações Paralelas de Alto Desempenho

  • Arthur Krause Universidade Federal do Rio Grande do Sul
  • Francis Moreira Universidade Federal do Rio Grande do Sul
  • Valéria Girelli Universidade Federal do Rio Grande do Sul
  • Philippe Olivier Navaux Universidade Federal do Rio Grande do Sul

Resumo


Conforme os processadores evoluem, o desempenho dos sistemas computacionais se torna cada vez mais limitado pelo tempo de acesso à memória. Caches são empregadas a fim de contornar este problema, mas é necessária uma gerência inteligente dos dados que são armazenados nelas para impedir que problemas como poluição e thrashing degradem seu desempenho. Neste trabalho é apresentada uma análise da poluição de cache e thrashing em aplicações paralelas de alto desempenho. Os resultados mostram que caches com maior associatividade sofrem mais com estes problemas. Até 28% dos cache misses na L1 poderiam ser evitados com uma política de substituição de cache mais inteligente, chegando a até 62% na cache L2 e 98% na LLC. As processors evolve, the performance of computer systems becomes increasingly limited by the memory access time. Caches are employed in order to get around this problem, but an intelligent management of the data that is stored in them is necessary to prevent problems such as pollution and thrashing from degrading their performance. In this work, an analysis of cache and thrashing pollution in high performance parallel applications is presented. The results show that caches with greater associativity suffer more from these problems. Up to 28% of cache misses in the L1 cache could be avoided with a smarter replacement policy, up to 62% in the L2 cache and 98% in the LLC.

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Publicado
08/11/2019
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KRAUSE, Arthur; MOREIRA, Francis; GIRELLI, Valéria; NAVAUX, Philippe Olivier. Poluição de Cache e Thrashing em Aplicações Paralelas de Alto Desempenho. In: SIMPÓSIO EM SISTEMAS COMPUTACIONAIS DE ALTO DESEMPENHO (SSCAD), 20. , 2019, Campo Grande. Anais [...]. Porto Alegre: Sociedade Brasileira de Computação, 2019 . p. 370-381. DOI: https://doi.org/10.5753/wscad.2019.8683.