Anéis e Hierarquias de Anéis com Interconexões ANSI/IEEE SCI
Abstract
Emergent high speed point-to-point communication technologies, for instance, ATM, SCI and FibreChannel, open new perspectives in high performance computation. The SCI is a new IEEE/ANSI standard that specifies protocols for scalable cache coherence over point-to-point high speed, low latency links. The SCI is been studied at LSI-EPUSP as a altemative to implement the SPADE, a large scale multiprocessor system. In this work, simulations of the SPADE-1 in ring and hierarchy of rings topologies based on links of 125MB/s are done in order to evaluate the impact of flow control and buffer size.
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