Integrando as Otimizações de Acessos a Dados e de Paralelismo
Resumo
Pesquisas anteriores têm adotado o uso de transformações de programa para aproveitar o paralelismo e explorar a localidade de dados. Infelizmente, ambos os objetivos têm sido considerados de maneira independente. Este trabalho apresenta meios para utilizar eficazmente o paralelismo e a hierarquia de memória dos modernos processadores paralelos. Os resultados experimentais utilizando alguns estudos de caso mostram que nossa estratégia resulta em ganhos significativos de desempenho.
Referências
BACON, D. F. et alii. Compiler transformations for high-performance computing. Technical Report N° UCB/CSD-93-781. Computer Science Division, University of California at Berkeley. 1993.
BANERJEE, U. Loop parallelization. Kluwer Academic Publishers, 1994.
CARR, S.; McKINLEY, K. S.; TSENG, C.-W. Compiler optimizations for improving data locality. In: Int. Conf. on Architectural Support for Programming Languages and Operating Systerns, 6, San Jose, CA. Proceedings. p.??-?1. October, 1994.
CIERNIAK, M. & LI, W. Unifying data and control transformations for distributed shared memory machines. Technical Report 542. Department of Computer Science, University of Rochester. November 1994.
EISENBEIS, C. et alii. A strategy for array management in local memory. Rapports de Recherche N° 1262. lnstitut National de Recherche en Informatique et en Automatique (INRIA), France. Juillet 1990.
HWANG, K. Advanced computer architecture: parallelism, scalability, programability. McGraw-Hill, 1993.
KENNEDY, K. & McKINLEY, K. S. Maximizing loop parallelism and improving data locality via loop fusion and distribution. In: Workshop on Languages and Compilers for Parallel Processing, 6, Portland, OR. Proceedings. p.301-20. August 1993.
LI, W. Compiling for NUMA parallel machines. PhD Thesis. Cornell University, 1993.
LI, W. Compiler optimizations for cache locality and coherence. Technical Report 504. Department of Computer Science, University of Rochester. April 1994.
LOPES, R. D. & RANGAYYAN, R. N. 3D region-based filters for noise removal. Submitted in Proc. IEEE ICIP-95 lnt. Conf. Image Processing. IEEE, Washington, D.C., October 1995.
MANJIKIAN, N. & ABDELRAHMAN, T. Fusion of loops for parallelism and locality. Technical Report CSRI-315. Computer Systems Research Institute, Department of Computer Science, Department of Electrical and Computer Engineering, University of Toronto, Canada. February 1995.
McKINLEY, K. S. Automatic and interactive parallelization. PhD. Thesis. Department of Computer Science, Rice University. April 1992.
MIDORIKAWA, E. T. Análise da Otimização de acessos à memória. In: Simpósio Brasileiro de Arquitetura de Computadores - Processamento de Alto Desempenho, 6, Caxambu, MG. Anais. p. 37-52. Agosto de 1994.
MIDORIKAWA, E. T. et alii. Um sistema integrado para otimização automática de paralelismo e localidade de dados. Submetido ao VII Simpósio Brasileiro de Arquitetura de Computadores-Processamento de Alto Desempenho (SBAC-PAD'95), 1995.
MOREIRA, J. E. On the Implementation and effectiveness of autoscheduling for shared-memory multiprocessor: PhD. Thesis. Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign. 1995.
SILICON GRAPHICS. Parallel programming on Silicon Graphics systems. Document number 007-0770-010, 1989.
TAKAHASHI, S.; MIDORIKAWA, E. T.; ZUFFO, J. A. Análise do padrão de acessos e otimização de localidade em sistemas de computação de alto desempenho. Submetido ao XII Concurso de Trabalhos de Iniciação Científica (CTIC'95). 1995.
WOLF, E. Improving locality and parallelism in nested loops. PhD. Thesis. Department of Computer Science, Stanford University. August 1992.
BANERJEE, U. Loop parallelization. Kluwer Academic Publishers, 1994.
CARR, S.; McKINLEY, K. S.; TSENG, C.-W. Compiler optimizations for improving data locality. In: Int. Conf. on Architectural Support for Programming Languages and Operating Systerns, 6, San Jose, CA. Proceedings. p.??-?1. October, 1994.
CIERNIAK, M. & LI, W. Unifying data and control transformations for distributed shared memory machines. Technical Report 542. Department of Computer Science, University of Rochester. November 1994.
EISENBEIS, C. et alii. A strategy for array management in local memory. Rapports de Recherche N° 1262. lnstitut National de Recherche en Informatique et en Automatique (INRIA), France. Juillet 1990.
HWANG, K. Advanced computer architecture: parallelism, scalability, programability. McGraw-Hill, 1993.
KENNEDY, K. & McKINLEY, K. S. Maximizing loop parallelism and improving data locality via loop fusion and distribution. In: Workshop on Languages and Compilers for Parallel Processing, 6, Portland, OR. Proceedings. p.301-20. August 1993.
LI, W. Compiling for NUMA parallel machines. PhD Thesis. Cornell University, 1993.
LI, W. Compiler optimizations for cache locality and coherence. Technical Report 504. Department of Computer Science, University of Rochester. April 1994.
LOPES, R. D. & RANGAYYAN, R. N. 3D region-based filters for noise removal. Submitted in Proc. IEEE ICIP-95 lnt. Conf. Image Processing. IEEE, Washington, D.C., October 1995.
MANJIKIAN, N. & ABDELRAHMAN, T. Fusion of loops for parallelism and locality. Technical Report CSRI-315. Computer Systems Research Institute, Department of Computer Science, Department of Electrical and Computer Engineering, University of Toronto, Canada. February 1995.
McKINLEY, K. S. Automatic and interactive parallelization. PhD. Thesis. Department of Computer Science, Rice University. April 1992.
MIDORIKAWA, E. T. Análise da Otimização de acessos à memória. In: Simpósio Brasileiro de Arquitetura de Computadores - Processamento de Alto Desempenho, 6, Caxambu, MG. Anais. p. 37-52. Agosto de 1994.
MIDORIKAWA, E. T. et alii. Um sistema integrado para otimização automática de paralelismo e localidade de dados. Submetido ao VII Simpósio Brasileiro de Arquitetura de Computadores-Processamento de Alto Desempenho (SBAC-PAD'95), 1995.
MOREIRA, J. E. On the Implementation and effectiveness of autoscheduling for shared-memory multiprocessor: PhD. Thesis. Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign. 1995.
SILICON GRAPHICS. Parallel programming on Silicon Graphics systems. Document number 007-0770-010, 1989.
TAKAHASHI, S.; MIDORIKAWA, E. T.; ZUFFO, J. A. Análise do padrão de acessos e otimização de localidade em sistemas de computação de alto desempenho. Submetido ao XII Concurso de Trabalhos de Iniciação Científica (CTIC'95). 1995.
WOLF, E. Improving locality and parallelism in nested loops. PhD. Thesis. Department of Computer Science, Stanford University. August 1992.
Publicado
29/07/1995
Como Citar
MIDORIKAWA, Edson T.; SATO, Liria Matsumoto.
Integrando as Otimizações de Acessos a Dados e de Paralelismo. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 7. , 1995, Canela.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
1995
.
p. 93-107.
DOI: https://doi.org/10.5753/sbac-pad.1995.19856.
