Desempenho Simulado de Modelos Fracos de Consistência de Memória
Resumo
Os dois modelos de consistência: Release e Entry, representam duas soluções distintas para o problema de coerência em sistemas de memória compartilhada distribuída. Release Consistency oferece um modelo viável para implementação em hardware enquanto que Entry Consistency é mais flexível e orientado para software. Neste trabalho simuladores dos dois modelos são desenvolvidos e testados numa rede de workstations utilizando PVM. Os modelos Release e bntry são avaliados baseando-se nas implementações DASH e Midway, respectivamente, utilizando-se uma rede com 2, 4 e 8 nós. Os resultados preliminares são contrastados com o desempenho de um sistema de memória distribuída equivalente e indicam que versões híbridas, ou seja, implementações preguiçosas em software de modelos de consistência de memória com suporte de hardware podem oferecer soluções atrativas.
Referências
Adve, S. V. and Hill, M.D., "A Unified Formalization of Four Shared-Memory Models", IEEE Transactions on Parallel and Distributed Systems, June 1993, pp 613-624.
Bershad, B.N. and Zekauskas, M.J, "Midway: Shared-Memory Parallel Programming with Entry Consistency for Distributed Memory Multiprocessors", Technical Report CMU-CS-91-170, Carnegie-Mellon University, September 1991.
Bershad, B.N., Zekauskas, M.J and Sawdon, W.A. "The Midway Distributed Memory System", COMPCON 1993.
Carter, J.B., Bennet, J.K. and Zwaenepoel, W. "Implementation and Performance of Munin", Proc of the 19th ACM Symp. on Operating Systems Principies, October 1991, pp 152-164.
Dubois, M. and Scheurich, C., "Memory Access Dependencies in Shared-Memory Multiprocessors", IEEE Transactions on Computers, June 1990, pp 660-673.
Dubois, Wang, J.C., Barroso, L. A., Kangwoo, L. and Chen, Y-S, "Delayed Consistency and Its Effects on The Miss Rate of Parallel Programs", Supercomputing 1991.
Gharachorloo, K., Gupta A. and Henessy, J.L. "Performance Evaluation of Memory Consistency Models for Shared-Memory Multiprocessors",Proc of the 4th Int. Conference on Architectural Support for Programming Languages and Operating Systems, April1991, pp 245-257.
Gharachorloo, K. Lenoski, D., Laudon, J., Gibbons, P., Gupta A. and Henessy, J.L. "Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors",Proc of the 17th Int. Symp. on Computer Architecture, May 1990, pp 148-159.
Keleher, P., Cox, A. and Zwaenepoel, W., "Lazy release Consistency for Software Distributed Shared Memory", Technical Report TR91-168 Computer Science Department, Rice university, November 1991.
Kontothanassis, L.I., Scott, M.L. and Bianchini, R., "Lazy Release Consistency for Hardware-Coherent Multiprocessors", Technical Report 547, University of Rochester, December 1994.
Lamport, L., "How to Make a Multiprocessor Computer that Correctly Executes Multiprocess Programs", IEEE Transactions on Computers, September 1979, pp 691-692.
Lenoski, 0., Laudon, J., Gharachorloo, K., Gupta A. and Henessy, J.L. "The Directory-Based Cache Coherence Protocol for The DASH Multiprocessor", Proc of the 17th Int. Symp. on Computer Architecture, May 1990, pp 148-159.
Singh, J.P., Weber, W-D and Gupta, A." S LASH: Stanford Parallel Applications for Shared-Memory", Computer Architecture News, March 1992, pp 5-44.
Zucker, R.N. and Baer, J-L, " A Performance Study of Memory Consistency Models", Proc of the 19th Int. Symp. on Computer Architecture, May 1992, pp 2-12.
