SPECint95 Performance of an Implementation of the Dynamically Trace Scheduled VLIW Architecture
Resumo
Dynamically trace scheduled VLIW (DTSVLIW) architectures can be used to implement machines that execute code of current RISC or CISC instruction set architectures in a VLIW fashion, delivering instruction level parallelism with backward code compatibility. This paper presents preliminary SPECint95 performance mesuraments of the DTSVLIW architecture, obtained with a simulator which has been implemented in C.
Referências
B. R. Rau, "Dynamically Scheduled VLIW Processors", Proc. of the 26th International Symposium on Microarchitecture, pp. 80-92, 1993.
K. Ebcioglu, E. R. Altman, "DAISY: Dynamic Compilation for 100% Architectural Compatibility", Proc. of the 24th lnternational Symposium on Computer Architecture, pp. 26-37, 1997.
R. Nair, M. E. Hopkins, "Exploiting Instructions Level Parallelism in Processors by Caching Scheduled Groups", Proc. of the 24th International Symposium on Computer Architecture, pp. 13-25.1997.
A. F. de Souza and P. Rounce, "Dynamically Trace Scheduled VLIW Architectures", Lecture Notes on Computer Science, Vol. 1401, pp.993-995, April 1998.
Sun Microsystems, "The Sparc Architecture Manual - Version 7", Sun Microsystems Inc., 1987.
S. Davidson, D. Landskov, B. D. Shriver, P. W. Mallett, "Some Experiments in Local Microcode Compaction for Horizontal Machines", IEEE Transactions on Computers, Vol. C30, No. 7. pp. 460-477, July 1981.
K. Ebcioglu, E. R. Altman, "DAISY: Dynamic Compilation for 100% Architectural Compatibility", Proc. of the 24th lnternational Symposium on Computer Architecture, pp. 26-37, 1997.
R. Nair, M. E. Hopkins, "Exploiting Instructions Level Parallelism in Processors by Caching Scheduled Groups", Proc. of the 24th International Symposium on Computer Architecture, pp. 13-25.1997.
A. F. de Souza and P. Rounce, "Dynamically Trace Scheduled VLIW Architectures", Lecture Notes on Computer Science, Vol. 1401, pp.993-995, April 1998.
Sun Microsystems, "The Sparc Architecture Manual - Version 7", Sun Microsystems Inc., 1987.
S. Davidson, D. Landskov, B. D. Shriver, P. W. Mallett, "Some Experiments in Local Microcode Compaction for Horizontal Machines", IEEE Transactions on Computers, Vol. C30, No. 7. pp. 460-477, July 1981.
Publicado
28/09/1998
Como Citar
SOUZA, Alberto Ferreira de; ROUNCE, Peter.
SPECint95 Performance of an Implementation of the Dynamically Trace Scheduled VLIW Architecture. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 10. , 1998, Búzios/RJ.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
1998
.
p. 185-188.
DOI: https://doi.org/10.5753/sbac-pad.1998.22688.
