Uma Arquitetura RISC para Computadores SIMD em GaAs

  • José Eduardo Moreira USP

Abstract

An architecture is described which is simple enough for implementing with a few GaAs ICs, yet very powerful for matrix processing. The APL language and the Illiac IV computer are taken as the basis for the architecture. The electronic implementation is taken into consideration.

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Published
1988-09-26
How to Cite
MOREIRA, José Eduardo. Uma Arquitetura RISC para Computadores SIMD em GaAs. Proceedings of the International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), [S.l.], p. 114-123, sep. 1988. ISSN 0000-0000. Available at: <https://sol.sbc.org.br/index.php/sbac-pad/article/view/23526>. Date accessed: 18 may 2024. doi: https://doi.org/10.5753/sbac-pad.1988.23526.