Avaliação de Compilação Vetorizada

  • Nilzete O. Álvares UFG
  • Leila M. R. Eizirik UFRJ
  • Claudio L. Amorim UFRJ

Abstract

The ideas and basic algorithms which have been proposed by Fischer and Donegan to vectorize an arithmetic expression compiler are evaluated through its implementation. Our experimental results confirm the hypothesis that the compiler process is massively vectorized. Furthermore we find that only seventeen vector instructions are responsible for 90% of the vectorization. In this work we describe the process of vectorization and the evaluation methodology used. The results are analysed and conclusions are drawn.

References

K. Hwang e F. A. Briggs, "Computer Architecture and Parallel Processing", McGraw-Hill Book Company, (1984).

D. A. Padua e M. J. Wolfe, "Advanced Compiler Optimizations for Supercomputers", Communications of the ACM, 29, no. 12, pp. 1184-1201, Dez. (1986).

C. N. Fischer, "On Parsing and Compiling Arithmetic Expressions on Vector Computers", ACM Transactions on Programming Languages and Systems, Vol. 2, no. 2, pp. 203-224, Abril (1984).

M. K. Donegan e S. W. Katzke, "Lezscal Analysis and Parsing Techniques for a Vector Machine", Proceedings of Conference on Programming Languages and Compilers for Parallel and Vector Machines, SIGPLAN Notices, vol. 10, no. 3, pp. 138-145, Margo (1975).

J. P. Riganati e P. B. Schneck, "Supercomputing", IEEE Computer, pp. 97-112, Outubro (1984).

N. O. Alvares e outros, "Um Compilador Vatorizado para Máquinas Vetoriais", XIII SEMISH e VI Congresso da SBC, Recife, pp. 616-620, Julho (1986).
Published
1988-09-26
How to Cite
ÁLVARES, Nilzete O.; EIZIRIK, Leila M. R.; AMORIM, Claudio L.. Avaliação de Compilação Vetorizada. Proceedings of the International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), [S.l.], p. 153-159, sep. 1988. ISSN 0000-0000. Available at: <https://sol.sbc.org.br/index.php/sbac-pad/article/view/23531>. Date accessed: 18 may 2024. doi: https://doi.org/10.5753/sbac-pad.1988.23531.