Um Montador para um Simulador de Processadores Vetoriais

  • C. L. Sales UFRJ
  • L. E. Favre UFRJ
  • M. C. S. de Castro UFRJ
  • C. L. Amorim UFRJ

Abstract

Most of Assembly Languages have a simple rule to build instructions based on mnemoni s which define the operation and their operands. Due to the direct relation between mnemonic and operation codes, the assembler designers for these languages use tables for the opcodes in order to simplify the process of assembler construction and maintenance. In this article we discuss the implementation of an Assembler for the CRAY-1 Assembly Language which doesn't have these features. In that language, most of the instructions don't have mnemonic and the relation between instructions and opcodes isn't direct. Due to this particularity, the development of an eficient Assembler requires a special solution which is presented.

References

Cc.L. Amorim, "Simulação de uma Classe de Processadores Vetoriais". Anais do I Simpósio Brasileiro de Arquitetura de Computadores - Processamento Paralelo. Jul. 1987, Gramado, RS.

C.L. Amorim, "The Vector Processor Simulator User's Guide", Relatório Técnico, Programa de Sistemas, COPPE/UFRJ, 1986.

Cray Research, Inc., "CRAY-1 Hardware Reference Manual", publ, nº 2240009, rev. F., 1979.

K. Hwang e F.A. Briggs, "Computer Architecture and Parallel Processing". McGRAW HILL 1987.

Tannenbaum, A.S., "Structered Computer Organization", Prentice - Hall 1984.
Published
1988-09-26
How to Cite
SALES, C. L. et al. Um Montador para um Simulador de Processadores Vetoriais. Proceedings of the International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), [S.l.], p. 160-164, sep. 1988. ISSN 0000-0000. Available at: <https://sol.sbc.org.br/index.php/sbac-pad/article/view/23532>. Date accessed: 18 may 2024. doi: https://doi.org/10.5753/sbac-pad.1988.23532.