A Java-to-ARM Hardware Code Translator

• Ta-Yung Hsu National Chiao Tung Universit
• Lee-Ren Ton National Chiao Tung Universit
• Lung-Chung Chang Industrial Technology Research Institute
• Chung-Ping Chung National Chiao Tung Universit

DOI: https://doi.org/10.5753/sbac-pad.2000.41202

Resumo

Java is one of the most popular programming languages. Various methods to run Java instructions (called Java bytecodes) have been developed, but each has its drawback. Therefore, we propose the concept of a Java/ARM dual-mode processor, which offers a better alternation to run Java and is still compatible with ARM for existing C applications. When executing the Java applets/applications, the bytecode instructions can be executed by the dual-mode processor on-the-fly. This is achieved by the proposed Java-to-Arm hardware code translator which is built in between the instruction fetcher and the instruction decoder. In the Java execution mode, the translator converts each bytecode into one or more ARM instructions on-the-fly. Besides, an ARM instructions folding technique is proposed to enhance the performance by combining the translated but not decode ARM instructions. Simulation results show that up to 15% performance gain can be achieved comparing to the original translator without folding.

Palavras-chave: Java bytecode, ARM, processor, dual-mode execution, binary translation

Referências

ARM Corporation. "ARM7TDMI Data Sheet." August 1995.

CHRISTIAN Ludloff. IA64 Speculations. [link], November 1997.

GRAY N. Hammond, et al. Processor Capable of Executing Programs That Contain RISC and CISC Instructions. US Patent US5638525, June 1997.

C.-H. A. Hsieh, J. C. Gyllenhaal and W. Mei Hwu. Java Bytecode to Native Code Translation: The Caffeine Prototype and Preliminary Results. Proceedings of the 29th Annual International Symposium on Microarchitecture (MICRO-29), December 1996, pp. 90-97.

JIM Davis. IBM Eyes Java Chips. [link], March 1998.

JIM Turley. Java Not to Everyone's Taste. Microprocessor Report, vol. 11, no. 6, May 1997.

E. Kemal, A. Erik and H. Erdem. A Java ILP Machine Based on Fast Dynamic Compilation. MASCOTS'97 International Workshop on Security and Efficiency Aspects of Java, 1997.

Linley Gwennap. First Merced Patent Surfaces. Microprocessor Report, March 1997.

LINLEY Gwennap. Intel HP Make EPIC Disclosure. Microprocessor Report, vol. 11, no. 14, October 1997.

J. M. O'Connor and M. Tremblay. picoJava-II: The Java Virtual Machine in Hardware. IEEE Micro, March/April 1997, pp. 45-53.

PETER Christy. IA-64 and Merced -- What and Why. Microprocessor Report, vol. 10, no. 17, December 1996.

RICK COOK. Java Embeds Itself in the Control Market. [link], January 1998.

Ron Curry. IA-64 Architecture. [link].

SUN Microsystems Inc. picoJava-II Microarchitecture Guide. March 1999.

Lee-Ren Ton, Lung-Chung Chang and Chung-Ping Chung. Exploiting Java Bytecode Parallelism by Enhanced POC Folding Model. Proceedings of the Euro-Par 2000, August 2000, Munich Germany.