A Simulator for SMP Platforms based on Multithreading Processors
Resumo
This work describes the design, implementation and use of a simulator for SMP platforms based on multithreading processors. It has been conceived as a simulator for the Multiplus multiprocessor SMP processing element, which will be based on the use of NCESPARC+ processors. The simulator can run applications from the Splash benchmark, which is often used in the evaluation of shared memory parallel systems. Due to some results produced by the simulator, modifications have been introduced in the original definition of the NCESPARC+ architecture. These modifications and some other architectural changes to increase the throughput of the Processing Element memory system are discussed in this paper. In addition, simulation results for three applications are also presented.
Palavras-chave:
multithreading, benchmark, simulation, SMP platforms, SPARC architecture
Referências
AUDE, J. S., et al. The Multiplus/Multiplix Parallel Processing Environment. Proceedings of the International Symposium on Parallel Architectures, Algorithms and Networks, Beijing, China, June 1996, pp. 50–56.
AUDE, J. S., Martins, F. R. S., M. A. S. Barbosa, M. João Jr., M. T. Young, S. B. Pinto. NCESPARC+: A Multithreading SPARC Architecture for the Multiplus Multiprocessor. Proceedings of the SBAC-PAD'99, Natal, RN, October 1999.
HENNESSY, John L.; Patterson, David A. Computer Architecture: A Quantitative Approach. Morgan Kaufmann Publishers, Inc. 2nd ed., 1996.
SUNSOFT, INC. Multithreaded Programming Guide – Solaris 2.5, 1995.
BARROS, M. O.; Aude, J. S. Implementação de bibliotecas Multi-thread no Sistema Operacional Multiplix. Proceedings of the VIII SBAC-PAD, Recife, PE, August 1996.
SINGH, P. J.; Weber, W. D.; Gupta, A. SPLASH: Stanford Parallel Applications for Shared-Memory. Computer Architecture News, 20(1):5–44, March 1992.
WOO, S. C.; Ohara, M.; Torrie, E.; Singh, P. J.; Gupta, A. The SPLASH-2 Programs: Characterization and Methodological Considerations. 22nd Annual International Symposium on Computer Architecture, pp. 24–36, June 1995.
THEKKATH, R.; Eggers, J. S. Impact of Sharing-Based Thread Placement on Multithreading Architectures. Proceedings of the 21st ISCA, pp. 176–186, 1994.
AUDE, J. S., Martins, F. R. S., M. A. S. Barbosa, M. João Jr., M. T. Young, S. B. Pinto. NCESPARC+: A Multithreading SPARC Architecture for the Multiplus Multiprocessor. Proceedings of the SBAC-PAD'99, Natal, RN, October 1999.
HENNESSY, John L.; Patterson, David A. Computer Architecture: A Quantitative Approach. Morgan Kaufmann Publishers, Inc. 2nd ed., 1996.
SUNSOFT, INC. Multithreaded Programming Guide – Solaris 2.5, 1995.
BARROS, M. O.; Aude, J. S. Implementação de bibliotecas Multi-thread no Sistema Operacional Multiplix. Proceedings of the VIII SBAC-PAD, Recife, PE, August 1996.
SINGH, P. J.; Weber, W. D.; Gupta, A. SPLASH: Stanford Parallel Applications for Shared-Memory. Computer Architecture News, 20(1):5–44, March 1992.
WOO, S. C.; Ohara, M.; Torrie, E.; Singh, P. J.; Gupta, A. The SPLASH-2 Programs: Characterization and Methodological Considerations. 22nd Annual International Symposium on Computer Architecture, pp. 24–36, June 1995.
THEKKATH, R.; Eggers, J. S. Impact of Sharing-Based Thread Placement on Multithreading Architectures. Proceedings of the 21st ISCA, pp. 176–186, 1994.
Publicado
24/10/2000
Como Citar
MARTINS, F. R. S.; AUDE, J. S..
A Simulator for SMP Platforms based on Multithreading Processors. In: INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND HIGH PERFORMANCE COMPUTING (SBAC-PAD), 12. , 2000, São Pedro/SP.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
2000
.
p. 295-302.
DOI: https://doi.org/10.5753/sbac-pad.2000.41228.
