Processador de Uso Específico para o Algoritmo SHA-1

• Carlos E. B. Santos Junior UFRN
• Marcelo A. C. Fernandes UFRN

DOI: https://doi.org/10.5753/sbseg.2017.19489

Abstract

This work proposes a Application-Specific System Processor (ASSP) hardware for the SHA-1 hash algorithm. The proposed hardware was implemented on a Field Programmable Gate Array (FPGA) Xilinx Virtex 6 xc6vlx240t-1ff1156. The processing time (throughput) and occupied area were analyzed for various parallel instance implementations of the SHA-1 hashing algorithm. The results showed that SHA-1 proposed hardware achieved a throughput about 0.644 Gbps for a unique instance and about 28 Gbps for 48 instances of the SHA-1 processor embedded on a FPGA. Several applications as password recovery, password validation and verification of big data integrity can be executed efficiently and fast with SHA-1 ASSP.

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