Em busca de soluções em nível de sistema para tecnologias não confiáveis
Resumo
Novas tecnologias, que oferecem dispositivos mais rápidos e menores, viabilizarão a produção de sistemas embarcados com bilhões de componentes. Entretanto, pulsos transitórios provocados por radiação irão ter duração maior do que o ciclo de relógio dos circuitos, descartando em decorrência disto o uso de diversas técnicas de mitigação de erros atuais, tais como aquelas baseadas em redundância temporal. Técnicas tradicionais em nível de hardware e que usam redundância espacial normalmente impõem pesadas penalidades em termos de área e potência, características inaceitáveis para aplicações embarcadas. Como uma alternativa para enfrentar tal cenário desafiador, este trabalho propõe o uso de técnicas de mitigação em nível de algoritmo, específicas para cada aplicação, capazes de detectar erros causados por falhas transitórias com sobrecarga de desempenho reduzida. Exemplos de tais técnicas para duas aplicações amplamente utilizadas em sistemas embarcados, multiplicação de matrizes e classificação, são apresentadas e comparadas com outras técnicas, para confirmar a potencialidade da abordagem proposta, e um caminho para generalização da aplicação da abordagem proposta é sugerido.Referências
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Daikon: invariant detector tool, available at [link], last accessed April 15, 2007.
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Ernst, M. D., Cockrell, J., and Griswold, W. G., “Dynamically Discovering Likely Program Invariants to Support Program Evolution”, IEEE Transactions on Software Engineering, Vol. 27, No. 2, IEEE Computer Society, New York, NY, February 2001, pp 99-123.
Ferlet-Cavrois, V. et all., “Statistical Analysis of the Charge Collected in SOI and Bulk Devices Under Heavy Ion and Proton Irradiation—Implications for Digital SETs”, IEEE Transactions on Nuclear Science, Vol 53, No 6, Part 1, IEEE Computer Society, Los Alamitos, CA, December 2006, pp 3242-3252.
Freivalds, R. “Probabilistic machines can use less running time”, in Proceedings of IFIP Congress 77, B. Gilchrist, editor, North-Holland, Toronto, August 1977, pp 839-842.
Heijmen, T., “Radiation Induced Soft Errors in Digital Circuits: A Literature survey”. Philips Electronics National Laboratory, Netherlands, Report 2002/828, August, 2002.
Huth, M. R. A. and Ryan, M. D., Logic in Computer Science: Modelling and reasoning about systems, Cambridge University Press, Cambridge, UK, 2001.
Johnson, B. W., Design and Analysis of Fault Tolerant Digital Systems: Solutions Manual, Addison-Wesley Publishing Company, Reading, MA, October 1994.
Knuth, D. E., The Art of Computer Programming: Volume 3 / Sorting and Searching, Addison-Wesley Publishing Company, Reading, MA, 1973.
Lima, F., Carro, L. and Reis, R., “Techniques for Reconfigurable Logic Applications: Designing Fault Tolerant Systems into SRAM-based FPGAs”, in Proceedings of the International Design Automation Conference, DAC 2003, pp. 650-655, ACM, New York, 2003.
Lisboa, C. A. and Carro, L., “System Level Approaches for Mitigation of Long Duration Transient Faults in Future Technologies”, to be published in Proceedings of the 18th Symposium on Integrated Circuits and Systems Design – ETS 2007, May 20-24, 2007.
Lisboa, C. A. L., Carro, L., Sonza Reorda, M., and Violante, M. “Online Hardening of Programs against SEUs and SETs”, in Proceedings of the 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - DFT 2006, IEEE Computer Society, Los Alamitos, CA, October 2006, pp. 280-288.
Lisboa, C. A., Schüler, E., and Carro, L., “Going Beyond TMR for Protection Against Multiple Faults”, in Proceedings of the 18th Symposium on Integrated Circuits and Systems Design – SBCCI 2005, Sociedade Brasileira de Computação, Florianópolis, September 4-7 2005, pp. 80-85.
Matlab web page: [link]. Last visited April 15, 2007.
Mitra, S., Seifert, N., Zhang, M., Shi, Q., and Kim, K. S., “Robust system design with built-in soft-error resilience”, in Computer, Vol. 38, No. 2, February 2005, pp. 43-52.
Motwani, R., and Raghavan, P., Randomized Algorithms, Cambridge University Press, New York, 1995.
Nieuwland, A. Jasarevic, S. and Jerin, G., “Combinational Logic Soft Error Analysis and Protection”, in Proceedings of the 12th IEEE International On-Line Test Symposium – IOLTS 2006, IEEE Computer Society, Los Alamitos, CA, July 2006, pp. 99-104.
Predictive Technology Model web site, last visited in April, 15 2007: [link]
Rossi, D., Omaña, M., Toma, F. and Metra, C., “Multiple Transient Faults in Logic: An Issue for Next Generation ICs ?”, in Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2005), IEEE Computer Society, Los Alamitos, CA, October 2005, pp. 352-360.
Sankaranarayanan, S., Sipma, H. B., and Manna, Z. “Non-linear Loop Invariant Generation using Gröbner Bases”, in Proceedings of the 31st ACM SIGPLAN-SIGACT Annual Symposium on Principles of Programming Languages, ACM Press, New York, NY, January 2004, pp 318-329.
Schüler, E., and Carro, L., “Reliable Circuits Design Using Analog Components”, in Proceedings of the 11th Annual IEEE International Mixed-Signals Testing Workshop – IMSTW 2005, Volume 1, IEEE Computer Society, Cannes, June 27-29, 2005, pp 166-170.
Synopsis web site: [link]. Last visited in November 2006.
Austin, T., “DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design”. In MICRO32 - Proceedings of the 32nd ACM/IEEE International 2185 Symposium on Microarchitecture, pages 196-207, Los Alamitos, CA, November, 1999.
Austin, T., Blaauw, D., Mudge, T., and Flautner, K., ”Making typical silicon matter with Razor”, IEEE Computer, Vol. 37, No. 3, IEEE Computer Society, Los Alamitos, March 2004, pp 57-65.
Cheynet, P., Nicolescu, B., Velazco, R., Rebaudengo, M., Sonza Reorda, M., and Violante, M., “Experimentally evaluating an automatic approach for generating safety-critical software with respect to transient errors”, IEEE Transactions on Nuclear Science, Vol. 47, No. 6 (part 3), December 2000, pp. 2231-2236.
Daikon: invariant detector tool, available at [link], last accessed April 15, 2007.
Dodd, P. E. et al., “Production and propagation of Single-Event Transients in High-Speed Digital Logic ICs”, IEEE Transactions on Nuclear Science, Vol 51, No 6, Part 2, IEEE Computer Society, Los Alamitos, CA, December 2004, pp 3278-3284.
Ernst, M. D., Cockrell, J., and Griswold, W. G., “Dynamically Discovering Likely Program Invariants to Support Program Evolution”, IEEE Transactions on Software Engineering, Vol. 27, No. 2, IEEE Computer Society, New York, NY, February 2001, pp 99-123.
Ferlet-Cavrois, V. et all., “Statistical Analysis of the Charge Collected in SOI and Bulk Devices Under Heavy Ion and Proton Irradiation—Implications for Digital SETs”, IEEE Transactions on Nuclear Science, Vol 53, No 6, Part 1, IEEE Computer Society, Los Alamitos, CA, December 2006, pp 3242-3252.
Freivalds, R. “Probabilistic machines can use less running time”, in Proceedings of IFIP Congress 77, B. Gilchrist, editor, North-Holland, Toronto, August 1977, pp 839-842.
Heijmen, T., “Radiation Induced Soft Errors in Digital Circuits: A Literature survey”. Philips Electronics National Laboratory, Netherlands, Report 2002/828, August, 2002.
Huth, M. R. A. and Ryan, M. D., Logic in Computer Science: Modelling and reasoning about systems, Cambridge University Press, Cambridge, UK, 2001.
Johnson, B. W., Design and Analysis of Fault Tolerant Digital Systems: Solutions Manual, Addison-Wesley Publishing Company, Reading, MA, October 1994.
Knuth, D. E., The Art of Computer Programming: Volume 3 / Sorting and Searching, Addison-Wesley Publishing Company, Reading, MA, 1973.
Lima, F., Carro, L. and Reis, R., “Techniques for Reconfigurable Logic Applications: Designing Fault Tolerant Systems into SRAM-based FPGAs”, in Proceedings of the International Design Automation Conference, DAC 2003, pp. 650-655, ACM, New York, 2003.
Lisboa, C. A. and Carro, L., “System Level Approaches for Mitigation of Long Duration Transient Faults in Future Technologies”, to be published in Proceedings of the 18th Symposium on Integrated Circuits and Systems Design – ETS 2007, May 20-24, 2007.
Lisboa, C. A. L., Carro, L., Sonza Reorda, M., and Violante, M. “Online Hardening of Programs against SEUs and SETs”, in Proceedings of the 21st IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - DFT 2006, IEEE Computer Society, Los Alamitos, CA, October 2006, pp. 280-288.
Lisboa, C. A., Schüler, E., and Carro, L., “Going Beyond TMR for Protection Against Multiple Faults”, in Proceedings of the 18th Symposium on Integrated Circuits and Systems Design – SBCCI 2005, Sociedade Brasileira de Computação, Florianópolis, September 4-7 2005, pp. 80-85.
Matlab web page: [link]. Last visited April 15, 2007.
Mitra, S., Seifert, N., Zhang, M., Shi, Q., and Kim, K. S., “Robust system design with built-in soft-error resilience”, in Computer, Vol. 38, No. 2, February 2005, pp. 43-52.
Motwani, R., and Raghavan, P., Randomized Algorithms, Cambridge University Press, New York, 1995.
Nieuwland, A. Jasarevic, S. and Jerin, G., “Combinational Logic Soft Error Analysis and Protection”, in Proceedings of the 12th IEEE International On-Line Test Symposium – IOLTS 2006, IEEE Computer Society, Los Alamitos, CA, July 2006, pp. 99-104.
Predictive Technology Model web site, last visited in April, 15 2007: [link]
Rossi, D., Omaña, M., Toma, F. and Metra, C., “Multiple Transient Faults in Logic: An Issue for Next Generation ICs ?”, in Proceedings of the 20th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT 2005), IEEE Computer Society, Los Alamitos, CA, October 2005, pp. 352-360.
Sankaranarayanan, S., Sipma, H. B., and Manna, Z. “Non-linear Loop Invariant Generation using Gröbner Bases”, in Proceedings of the 31st ACM SIGPLAN-SIGACT Annual Symposium on Principles of Programming Languages, ACM Press, New York, NY, January 2004, pp 318-329.
Schüler, E., and Carro, L., “Reliable Circuits Design Using Analog Components”, in Proceedings of the 11th Annual IEEE International Mixed-Signals Testing Workshop – IMSTW 2005, Volume 1, IEEE Computer Society, Cannes, June 27-29, 2005, pp 166-170.
Synopsis web site: [link]. Last visited in November 2006.
Publicado
30/06/2007
Como Citar
LISBOA, Carlos A. L.; CARRO, Luigi.
Em busca de soluções em nível de sistema para tecnologias não confiáveis. In: SEMINÁRIO INTEGRADO DE SOFTWARE E HARDWARE (SEMISH), 34. , 2007, Rio de Janeiro/RJ.
Anais [...].
Porto Alegre: Sociedade Brasileira de Computação,
2007
.
p. 2173-2187.
ISSN 2595-6205.
