Instruction Compression in Runtime for Embedded Systems
Resumo
The efficient use of embedded systems relies heavily on appropriate strategies to optimize the execution time and power consumption. These systems are characterized by resource restrictions, including the amount of memory available for applications. However, there are several techniques that make the embedded systems more efficient. One of those techniques is the code compression; the proposals found in the analyzed literature assume that the code is compressed at compilation time and decompressed at runtime. This article proposes the development of a new method of compression and decompression (on-the-fly) called of MIC (Middle Instruction Compression). The MIC was compared with the Huffman method and both were implemented in hardware using VHDL and FPGA. The results of our experiments showed that the MIC achieved better performance when compared to Huffman for some programs from MiBench. We have reduced 17% the number of logical elements of FPGA and 6% clock frequency (in MHz) and 42% rate of compression.
Referências
R. J. de Azevedo. Uma Arquitetura para Código Comprimido em Sistemas Dedicados. Tese de Doutorado, Instituto de Computação da UNICAMP, Brasil, Junho de 2002. 136 p.
L. Benini, A. Macii and A. Nannarelli. “Cached-Code Compression for Energy Minimization in Embedded Processor”. In Proceedings of the International Symposium on Low-Power, Electronics and Design (ISPLED'01). Huntington Beach, California, USA, August 2001, pp. 322-327.
J. Davis II, M. Goel, C. Hylands, B. Kienhuis, E. A. Lee, J. Liu, X. Liu, L. Muliadi, S. Neuendorffer, J. Reekie, N. Smyth, J. Tsay and Y. Xiong. Overview of the Ptolemy Project, ERL Technical Memorandum UCB/ERL, Technical Report Nº M-99/37, Department of Electrical Engineering and Computer Science, Univ. of California, Berkeley, California, USA, July 6, 1999.
M. Guthaus, J. Ringenberg, D. Ernst, T. Austin, T. Mudge and R. Brown. “MiBench: A Free, Commercially Representative Embedded Benchmark Suite”. In Proceedings of the IEEE 4th Annual Workshop on Workload Characterization (WWC-4). Austin, Texas, USA, December 2001, pp. 3-14.
D. A. Huffman. “A Method for the Construction of Minimum-Redundancy Codes”. Proceedings of the Institute of Radio Engineers (IRE), 40(9):1098-1101, September 1952.
C. Lefurgy, P. Bird, I-C. Chen and T. Mudge. “Improving Code Density Using Compression Techniques”. In Proceedings of 30th Annual International Symposium on Microarchitecture (MICRO 30). Research Triangle Park, NC, USA, December 1997, pp. 194-203.
H. Lekatsas, J. Henkel and V. Jakkula. “Design of One-Cycle Decompression Hardware for Performance Increase in Embedded Systems”. In Proceedings of the 39th Annual Design Automation Conference (DAC'02). New Orleans, Louisiana, USA, June 2002, pp. 34-39.
H. Lekatsas and W. Wolf. “Code Compression for Embedded Systems”. In Proceedings of the 35th Annual Design Automation Conference (DAC'98). San Francisco, California, USA, June 1998, pp. 516-521.
E. B. W. Netto. Compressão de Código Baseada em Multi-Profile. Tese de Doutorado, Instituto de Computação, Universidade Estadual de Campinas, Maio de 2004. 137 p.
E. B. W. Netto, R. Azevedo, P. Centoducatte and G. Araújo. “Mixed Static/Dynamic Profiling for Dictionary Based Code Compression”. In Proc. of the Intl. Symposium on System-on-Chip (SoC'03). Tampere, Finland, November 2003, pp. 159-163.
E. B. W. Netto, R. Azevedo, P. Centoducatte and G. Araújo. “Multi-Profile Based Code Compression”. In Proceedings of the 41th Annual Design Automation Conference (DAC'04). San Diego, California, USA, June 2004, pp. 244-249.
E. B. W. Netto, R. S. de Oliveira, R. Azevedo, P. Centoducatte. Compressão de Código em Sistemas Embarcados. HOLOS CEFET-RN. Ano 19, páginas 23-28, Dezembro, 2003. 94p.
A. S. de Oliveira, F. S. de Andrade. Sistemas Embarcados - Hardware e Firmware na Prática. Editora Érica, 2006, 316p.
A. Wolfe and A. Chanin. “Executing Compressed Programs on an Embedded RISC Architecture”. In Proceedings of 25th Annual Intl. Symposium on Microarchitecture (MICRO 25). Portland, Oregon, USA, December 1992, pp. 81-91.
W. R. A. Dias. Arquitetura PDCCM em Hardware para Compressão/Descompressão de Instruções em Sistemas Embarcados. Dissertação de Mestrado, Departamento de Ciência da Computação da UFAM, Brasil Abril de 2009. 152 p.
IDA - The Interactive Disassembler. Disponível em: http://www.hex-rays.com. Acessado em 03 de maio de 2010.
